8-bit Microcontrollers中的主题 Byte content differs in ISR routine

Byte content differs in ISR routine

mylim — Wed, 11 Jun 2008 16:37:17 GMT

Hi, I'm having some problem with my code

1.when i 'lda' my TXBUF+1 which is TXBUF,X in my isr routine i keep getting a different value as shown in my memory (not as what i wanted). - (2_isr.jpg)

2.Therefore, I tried doing it before the isr occurs, I managed to get the correct value as in the memory.

(1_b4 isr.jpg)

3.similiarly, the isr occur & i didn't get what i wanted. (2_isr.jpg)

4.However, after the isr & I trigger the similiar routine in step 1 i dont seem to be able to get the value similiar to the mamory anymore. (3_after isr.jpg)

Please advise.

Regards,

3_after_isr.jpg

1_b4_isr.jpg

2_isr.jpg

Message Edited by t.dowe on 2009-10-19 10:39 AM

Re: Byte content differs in ISR routine

tonyp — Wed, 11 Jun 2008 16:58:57 GMT

I didn't spend much time but it seems the screen shots you provided don't give enough information (the memory window for example is locked at $220 while HX points at different places.)

Anyway, I don't see a PULH before the RTI which implies you either don't initialize H (I don't see it in the code segment) which would make all indexed mode instructions pretty much random, based on the value of H before entering the ISR, or you're destroying it, which again will cause problems.

Re: Byte content differs in ISR routine

mylim — Wed, 11 Jun 2008 17:08:01 GMT

hi Tony,

I did psha & pshx when entering the isr & pulx & pula upon exit.

Are you saying that pshh & pulh is required too?

Thanks.

Regards,

Re: Byte content differs in ISR routine

tonyp — Wed, 11 Jun 2008 17:10:49 GMT

Not only that. I'm also saying you don't seem to be initializing H which is required for indexed mode addressing. X alone is not enough.

By the way, ISRs automatically save all registers, EXCEPT register H. So, you're saving/restoring the wrong set of registers.

Message Edited by tonyp on 2008-06-11 01:12 PM

Re: Byte content differs in ISR routine

mylim — Wed, 11 Jun 2008 17:19:08 GMT

Hi Tony,

I'd tried with pshh & pulh it seems to be the same because i didn't involve HX where i only use X.

I suppose it wont effect H rite?

Meanwhile, as you were saying

tonyp wrote:
(the memory window for example is locked at $220 while HX points at different places.)

the register column HX is showing 200 meaning X=00 where it's refering to TXBUF,0 which means TXBUF+0 am i right?

Please let me know what other information i should provide in order to assist you to help me understand my problem.

Thanks.

regards,

4_pshh.jpg

Message Edited by t.dowe on 2009-10-27 12:20 PM

Re: Byte content differs in ISR routine

tonyp — Wed, 11 Jun 2008 17:22:17 GMT

Indexed instructions use HX, not X alone.

So, lda OFFSET,x

will add OFFSET to HX and use that as an address. You MUST initialize HX to the correct base location. Hope you see the problem now.

Message Edited by tonyp on 2008-06-11 01:23 PM

Re: Byte content differs in ISR routine

mylim — Wed, 11 Jun 2008 17:22:53 GMT

Hi Tony,

I finally got it.

Now that i understands the concept & relation between H & X.

Thanks man.

Regards,

Re: Byte content differs in ISR routine

erooll — Thu, 12 Jun 2008 10:40:34 GMT

Hi...
Tonyp has reason, its a good practice to save context of H register into a interruption (pshh) this needs be the first instruction into our interruption code, and reload his value (pulh) this needs be the last instruction before rti.

The HC08 family not save H register automatically when a interrupt has ocurred in order to maintain compatibility with old code in HC05 family.

But when you write your code in C, the compiler automatically adds this instructions into your handler interrupt function.