S32K11x SM 5.6.6 - NVIC or interrupts?

Catosh — Wed, 17 Jul 2019 14:44:29 GMT

Hi All,

I have many questions about assumptions from SM rev. 4. Let's start with NVIC section:

[SM_100], implementation hint: "A possible way to detect spurious interrupts is to check corresponding interrupt status in the interrupt status register (polling) of the related peripheral before executing the Interrupt Service Routine (ISR) service code"

For me it's not clear if I have to monitor the pending status of the NVIC or of interrupt flags set in the peripheral register.

If a I am going to poll for the interrupt flags in a peripheral register, I must also keep track of:

global interrupt enable\disable bit status (cpsid/cpsie)

and Interrupt enabled in NVIC (peripheral)

Furthermore, shall I monitor periodically the critical interrupts in polling (e.g while loop and if irq present execute callback) or just poll the irq registers of the peripheral in the callback provided in VTOR before executing some code?

And what's the difference between the implementation hint of [SM_098]?

K.R.

Luca.

Re: S32K11x SM 5.6.6 - NVIC or interrupts?

atzelcollazo — Tue, 30 Jul 2019 14:13:44 GMT

Hello Catosh,

Both ways should be checked (The NVIC and the peripheral interrupt). The [SM_100] checks interrupt status while [SM_098] is ensure correct NVIC functionality. This means the application should detect an NVIC failure. E.g. no interrupt, continuous interrupt, missed interrupt, delayed interrupt. etc.

Best Regards,

Atzel Collazo

topic Re: S32K11x SM 5.6.6 - NVIC or interrupts? in SafeAssure Community (Archived)

S32K11x SM 5.6.6 - NVIC or interrupts?

Re: S32K11x SM 5.6.6 - NVIC or interrupts?