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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic MC9S12XEG128 EEE ? in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238502#M9523</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I’ve used MC9S12XEG128 and I used EEE for data storage.&lt;/P&gt;&lt;P&gt;In some units after initializing EEE, FERSTAT_ERSVIF0 be set and EEE won’t transfer any data to D-Flash.&lt;/P&gt;&lt;P&gt;What should I do for FERSTAT Error handling?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 25 Jun 2013 11:12:42 GMT</pubDate>
    <dc:creator>adelantesey</dc:creator>
    <dc:date>2013-06-25T11:12:42Z</dc:date>
    <item>
      <title>MC9S12XEG128 EEE ?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238502#M9523</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I’ve used MC9S12XEG128 and I used EEE for data storage.&lt;/P&gt;&lt;P&gt;In some units after initializing EEE, FERSTAT_ERSVIF0 be set and EEE won’t transfer any data to D-Flash.&lt;/P&gt;&lt;P&gt;What should I do for FERSTAT Error handling?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Jun 2013 11:12:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238502#M9523</guid>
      <dc:creator>adelantesey</dc:creator>
      <dc:date>2013-06-25T11:12:42Z</dc:date>
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    <item>
      <title>Re: MC9S12XEG128 EEE ?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238503#M9524</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In fact I never met with such issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ERSVIF0 bit:&lt;/P&gt;&lt;P&gt;The setting of the ERSVIF0 flag indicates that the memory controller was unable to format a D-Flash EEE sector for EEE use. The ERSVIF0 flag is cleared by writing a 1 to ERSVIF0. Writing a 0 to the ERSVIF0 flag has no effect on ERSVIF0. While ERSVIF0 is set, it is possible to write to the buffer RAM EEE partition but the data written will not be transferred to the D-Flash EEE partition.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, ERSVIF0 can be cleared, however I suppose that this will not solve root cause of this issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Critical EEE Fault Flags&lt;/P&gt;&lt;P&gt;The access error (ACCERR) bit will be set by:&lt;/P&gt;&lt;P&gt;• The Enable EEE and Disable EEE commands if there is no EEE partition defined&lt;/P&gt;&lt;P&gt;• Either of the partition D-flash commands if an illegal partition ratio is requested&lt;/P&gt;&lt;P&gt;• The Enable EEE command if there is no EEE partition defined&lt;/P&gt;&lt;P&gt;• Errors encountered while initializing the EEE RAM during the FTM reset sequence&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The MGSTAT0 and MGSTAT1 bits will set following reset for:&lt;/P&gt;&lt;P&gt;• The Partition D-flash command if an EEE partition is already defined&lt;/P&gt;&lt;P&gt;• Unrecoverable fault reading EEE partition information —in this case, the EEE feature is disabled&lt;/P&gt;&lt;P&gt;with ERPART =&amp;gt; 0x0000 and DFPART =&amp;gt; 0xFFFF&lt;/P&gt;&lt;P&gt;• Double fault detected reading the EEE protection byte in the flash configuration field—in this case,&lt;/P&gt;&lt;P&gt;the EPROT register is loaded with 0x7F = EEE RAM fully protected&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, from this description it seems that Partitioning was not successfully or data in IFR was damaged.&lt;/P&gt;&lt;OL style="list-style-type: decimal;"&gt;&lt;LI&gt;Please check if FCLKDIV register is correctly set after every MCU reset.&lt;/LI&gt;&lt;LI&gt;Please check DFPART (0x12_0000 – 0x12_0001) and ERPART (0x12_0004 – 0x12_0005) values in IFR field.&amp;nbsp; You can also check duplicates at global addresses 0x12_0002 – 0x12_0003 and 0x12_0006 – 0x12_0007. These data will be available after command MMCCTL1_EEEIFRON = 1;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //enable EEEIFR in memory map&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately there isn’t any other way how restore data in IFR field except Mass Erase Blocks command.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In attachment you can find simple example code and short description of EEEPROM at S12XEP100.&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Jun 2013 15:09:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238503#M9524</guid>
      <dc:creator>RadekS</dc:creator>
      <dc:date>2013-06-27T15:09:14Z</dc:date>
    </item>
    <item>
      <title>Re: MC9S12XEG128 EEE ?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238504#M9525</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Adelante,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;was this useful to you? Please keep us posted :smileyhappy:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Monica&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Jul 2013 20:31:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238504#M9525</guid>
      <dc:creator>Monica</dc:creator>
      <dc:date>2013-07-05T20:31:03Z</dc:date>
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    <item>
      <title>Re: MC9S12XEG128 EEE ?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238505#M9526</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;yes, problem still exists, but I've changed topic to &lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/message/338668#338668" style="font-weight: bold; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3778c7;"&gt; MC9S12XEG EEE repartitioning problem &lt;/A&gt;&lt;/P&gt;&lt;P&gt;and persuade problem on that.&lt;/P&gt;&lt;P&gt;thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 06 Jul 2013 05:14:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12XEG128-EEE/m-p/238505#M9526</guid>
      <dc:creator>adelantesey</dc:creator>
      <dc:date>2013-07-06T05:14:52Z</dc:date>
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</rss>

