MC9S12NE64 - MII MRADR Register Description

KH_SRNL — Thu, 09 Jan 2014 22:00:01 GMT

I am looking for additional documentation / app notes on the MC9S12NE64 MII Managment Register descriptions. Specifically, the MRADR (MII Management Register Address) bit fields RADDR. When a value is written to the RADDR field, what registers are actually accessed? Based on sample code provided with the MC9S12NE64, it appears the MRADR and MPADR are used in conjunction to access PHY registers (but per my prior statement I'm unable to find a list / description of the PHY registers accessed through the MRADR register). In the example code, a higher level function call that writes data to the MII includes (within the write function) a MII read with RADDR set to 0x10. The sample header file documents this location as the PHY interrupt register. It really doesn't make sense to me why a read of the interrrupt register would be needed after the write (the code is not interrupt driven).

The code snippet is:

unsigned char MIIwrite(unsigned char mpadr, unsigned char mradr, unsigned int mwdata)

{

unsigned int temprdata;

MPADR = mpadr; //select physical address, 0 = internal PHY

MRADR = mradr; //selects register on PHY, but no information on these registers can be found

MWDATA = mwdata; //place 16 bit data into MII buffer

MCMST = MCMST|0x01; //execute write operation

while(!(IEVENT&0x80); //wait for write to complete

IEVENT = IEVENT&~0x80; //clear write complete flag

while(!(MIIread(PHY_ADDRESS, PHY_REG_IR, &temprdata)); //PHY_ADDRESS = 0 for internal PHY, PHY_REG_IR is the phy interrupt register according to sample code documentation?? Don't understand why the read of the

//interrupt reg & can't find any documentation on the interrupt reg or other PHY regs

}

Re: MC9S12NE64 - MII MRADR Register Description

iggi — Tue, 14 Jan 2014 14:19:10 GMT

Hi,

here you can find some app notes and useful documents:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=S12NE&fpsp=1&tab=Documentation_Tab

There is for example AN2629 MC9S12NE64 Integrated Ethernet Controller. It gives some more info about MII Management Interface and the registers you mentioned.

http://cache.freescale.com/files/microcontrollers/doc/app_note/AN2692.pdf

Also, useful should be AN2700 and AN2836. These comes with SW packages.

Hopefully the information helps.

Regards,

Ivan

topic MC9S12NE64 - MII MRADR Register Description in S12 / MagniV Microcontrollers

MC9S12NE64 - MII MRADR Register Description

Re: MC9S12NE64 - MII MRADR Register Description