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    <title>topic Re: XEP100 - MPU Descriptors granularity in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XEP100-MPU-Descriptors-granularity/m-p/217971#M9124</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Hello Pedro_,&lt;BR /&gt;&lt;BR /&gt;no, it would not be a protection violation for accesses within the 0x13F889..0x13F88F range.&lt;BR /&gt;&lt;BR /&gt;The address configuration bits in the MPU descriptors which cannot be set due to granularity are internally treated like this:&lt;BR /&gt;&lt;UL&gt;&lt;LI&gt;Lower Boundary addresses are right-appended with zeroes.&lt;/LI&gt;&lt;LI&gt;Upper Boundary addresses are right-appended with ones.&lt;/LI&gt;&lt;/UL&gt;So, for example, if you do this:&lt;BR /&gt;&lt;BR /&gt;Start = 0&lt;BR /&gt;End = 0&lt;BR /&gt;&lt;BR /&gt;you get the range 0..7.&lt;BR /&gt;&lt;BR /&gt;MJW&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 21 Jan 2009 22:30:25 GMT</pubDate>
    <dc:creator>MJW</dc:creator>
    <dc:date>2009-01-21T22:30:25Z</dc:date>
    <item>
      <title>XEP100 - MPU Descriptors granularity</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XEP100-MPU-Descriptors-granularity/m-p/217970#M9123</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi all,&lt;/DIV&gt;&lt;DIV&gt;there's something about the granularity of the Memory Protection Unit descriptors that is not clear to me.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Let say I have a section of&amp;nbsp;data&amp;nbsp;starting at 0x13F800 and ending at 0x13F88F&lt;/DIV&gt;&lt;DIV&gt;Because of the 8 byte granularity, the actual addresses loaded in the descriptors would be:&lt;/DIV&gt;&lt;DIV&gt;Start -&amp;nbsp;0x13F800&lt;/DIV&gt;&lt;DIV&gt;End&amp;nbsp; - 0x13F88&lt;SPAN style="color: #ff0000;"&gt;8&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;So, when accssing addresses between 0x13F88&lt;SPAN style="color: #ff0000;"&gt;9&lt;/SPAN&gt; and 0x13F88&lt;SPAN style="color: #ff0000;"&gt;F&lt;/SPAN&gt;, would that be a protection violation?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;It doesn't seem to be so I thought I'd double check with you ..&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Jan 2009 21:36:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XEP100-MPU-Descriptors-granularity/m-p/217970#M9123</guid>
      <dc:creator>Pedro_</dc:creator>
      <dc:date>2009-01-21T21:36:45Z</dc:date>
    </item>
    <item>
      <title>Re: XEP100 - MPU Descriptors granularity</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XEP100-MPU-Descriptors-granularity/m-p/217971#M9124</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Hello Pedro_,&lt;BR /&gt;&lt;BR /&gt;no, it would not be a protection violation for accesses within the 0x13F889..0x13F88F range.&lt;BR /&gt;&lt;BR /&gt;The address configuration bits in the MPU descriptors which cannot be set due to granularity are internally treated like this:&lt;BR /&gt;&lt;UL&gt;&lt;LI&gt;Lower Boundary addresses are right-appended with zeroes.&lt;/LI&gt;&lt;LI&gt;Upper Boundary addresses are right-appended with ones.&lt;/LI&gt;&lt;/UL&gt;So, for example, if you do this:&lt;BR /&gt;&lt;BR /&gt;Start = 0&lt;BR /&gt;End = 0&lt;BR /&gt;&lt;BR /&gt;you get the range 0..7.&lt;BR /&gt;&lt;BR /&gt;MJW&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Jan 2009 22:30:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XEP100-MPU-Descriptors-granularity/m-p/217971#M9124</guid>
      <dc:creator>MJW</dc:creator>
      <dc:date>2009-01-21T22:30:25Z</dc:date>
    </item>
    <item>
      <title>Re: XEP100 - MPU Descriptors granularity</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XEP100-MPU-Descriptors-granularity/m-p/217972#M9125</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Thanks for your answer MJW&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Jan 2009 23:07:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XEP100-MPU-Descriptors-granularity/m-p/217972#M9125</guid>
      <dc:creator>Pedro_</dc:creator>
      <dc:date>2009-01-21T23:07:12Z</dc:date>
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