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    <title>topic Re: 9S12DJ64 reset vector table programming in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12DJ64-reset-vector-table-programming/m-p/216256#M9035</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;$FF80-$FFFF is indeed included. It is accessible on PPAGE=0x3F at 0xBF80-0xBFFF.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;As far as I know for paged derivatives D-Bug12 assumes S records are only in linear/physical format. This means you should not find any S1 record in your file, only S2 records with linear/physical addresses in the range 0x0F0000 to 0x0FFFFF. Linear address is P*W+O, where P is page number, W - size of page window (0x4000) and O offset within page window.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You asked before about SrecCvt arguments. Depending on your S records file, Sreccvt may be unable to convert your S records. You may try using&amp;nbsp;Log2Phy uility from &lt;A href="http://www.pemicro.com" rel="nofollow" target="_blank"&gt;www.pemicro.com&lt;/A&gt;.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 03 Aug 2010 15:30:36 GMT</pubDate>
    <dc:creator>kef</dc:creator>
    <dc:date>2010-08-03T15:30:36Z</dc:date>
    <item>
      <title>9S12DJ64 reset vector table programming</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12DJ64-reset-vector-table-programming/m-p/216255#M9034</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm unable to program the reset vector table on my 9S12DJ64.&amp;nbsp; I'm using D-Bug12 version 4.0.0b32 and it shows my target as the following, straight out of reset:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Device: S12DJ64, MC9S12DJ64, MC9S12D64, MC9S12A64&lt;BR /&gt;EEPROM: $0000 - $03FF&lt;BR /&gt;Flash: $8000 - $BFFF&amp;nbsp; Pages: 4&amp;nbsp; PPAGE at: $0030&lt;BR /&gt;RAM: $0000 - $0FFF&lt;BR /&gt;I/O Regs: $0000 - $03FF&lt;BR /&gt;Target Speed: 16000 KHz&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I see that the vector table area ($FF80-$FFFF) does not appear in the &lt;EM&gt;Flash&lt;/EM&gt; space.&amp;nbsp; Attempts to &lt;EM&gt;fload&lt;/EM&gt; my s-records into that space fail.&amp;nbsp; The manual for the 9S12DJ64 says that the reset vector table is available out of reset without setting &lt;EM&gt;PPAGE&lt;/EM&gt;, yet I cannot seem to access and program the table.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any ideas on what I might be doing wrong?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Aug 2010 09:10:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12DJ64-reset-vector-table-programming/m-p/216255#M9034</guid>
      <dc:creator>68HC912B32Guy</dc:creator>
      <dc:date>2010-08-03T09:10:51Z</dc:date>
    </item>
    <item>
      <title>Re: 9S12DJ64 reset vector table programming</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12DJ64-reset-vector-table-programming/m-p/216256#M9035</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;$FF80-$FFFF is indeed included. It is accessible on PPAGE=0x3F at 0xBF80-0xBFFF.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;As far as I know for paged derivatives D-Bug12 assumes S records are only in linear/physical format. This means you should not find any S1 record in your file, only S2 records with linear/physical addresses in the range 0x0F0000 to 0x0FFFFF. Linear address is P*W+O, where P is page number, W - size of page window (0x4000) and O offset within page window.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You asked before about SrecCvt arguments. Depending on your S records file, Sreccvt may be unable to convert your S records. You may try using&amp;nbsp;Log2Phy uility from &lt;A href="http://www.pemicro.com" rel="nofollow" target="_blank"&gt;www.pemicro.com&lt;/A&gt;.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Aug 2010 15:30:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12DJ64-reset-vector-table-programming/m-p/216256#M9035</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2010-08-03T15:30:36Z</dc:date>
    </item>
    <item>
      <title>Re: 9S12DJ64 reset vector table programming</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12DJ64-reset-vector-table-programming/m-p/216257#M9036</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Kef, Thank you (and P&amp;amp;E too) very much! Log2Phy seems to be what I needed. I was able to convert my MiniIDE s19 file with that utility and program in $BF80-$BFFF at $3F. It now points to another place in FLASH that remaps the memories and registers and then points to the remapped EEPROM which will then have the "real" reset vector. Now I'm working out how to program the EEPROM. Once I get that done, I can finally use this board from a POR. So much has changed since the 912B32. Most of my code was directly portable to the 9S12DJ64 but registers moved around of course, EEPROM programming is different, a few had different functions and the memory paging has been a bear for me to learn. Thanks again.&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Aug 2010 12:10:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12DJ64-reset-vector-table-programming/m-p/216257#M9036</guid>
      <dc:creator>68HC912B32Guy</dc:creator>
      <dc:date>2010-08-04T12:10:07Z</dc:date>
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