<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Issues with Timer Module, Pulse Accumulator B set to Event Counter Mode - MC9S12DP256B in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Issues-with-Timer-Module-Pulse-Accumulator-B-set-to-Event/m-p/213036#M8896</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Pulse accumulators A and B are not the same. PACTL register has edge and mode select bits, while PBCTL doesn't have edge select bits. Active edge for accumulator B is selected the same as input capture edge for channel 0. So you should also set up TCTL4 register. According to ECT_16B8C Block User Guide V01.06, pulse accumulator B (like pulse accumulator A) is also independent from timer enable bit (TEN).&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I don't know why do you want to access PACN3 and PACN2 in the same cycle. Pulse accumulator B uses concatenated 16bits register PACN1&lt;IMG alt=":smileytongue:" class="emoticon emoticon-smileytongue" id="smileytongue" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-tongue.gif" title="Smiley Tongue" /&gt;ACN0.&lt;/DIV&gt;&lt;DIV&gt;Try writing help and hit enter in CW command window. DW command seems to be what you need.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 30 Dec 2008 16:40:31 GMT</pubDate>
    <dc:creator>kef</dc:creator>
    <dc:date>2008-12-30T16:40:31Z</dc:date>
    <item>
      <title>Issues with Timer Module, Pulse Accumulator B set to Event Counter Mode - MC9S12DP256B</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Issues-with-Timer-Module-Pulse-Accumulator-B-set-to-Event/m-p/213035#M8895</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;P&gt;I am using MC9S12DP256B. I am trying to get Pulse Accumulator A and Pulse Accumulator B working in Event Counter Mode for both A and B. I have function Generator connected to ICO0 and ICO7. Timer Registers are all default except: PACTL = 40h and PBCTL = 40h. Pulse Accumulator A works fine with this setup but Pulse Accumulator B is not counting pulses. I am not sure what I am doing wrong.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Also I am using Code Warrior, with what command would I be able to read PACN3 and PACN2 in one clock cycle.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for all the help and Happy New Year everybody.&lt;/P&gt;&lt;P&gt;Ulan&lt;BR /&gt;&lt;/P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Dec 2008 10:23:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Issues-with-Timer-Module-Pulse-Accumulator-B-set-to-Event/m-p/213035#M8895</guid>
      <dc:creator>admin</dc:creator>
      <dc:date>2008-12-30T10:23:26Z</dc:date>
    </item>
    <item>
      <title>Re: Issues with Timer Module, Pulse Accumulator B set to Event Counter Mode - MC9S12DP256B</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Issues-with-Timer-Module-Pulse-Accumulator-B-set-to-Event/m-p/213036#M8896</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Pulse accumulators A and B are not the same. PACTL register has edge and mode select bits, while PBCTL doesn't have edge select bits. Active edge for accumulator B is selected the same as input capture edge for channel 0. So you should also set up TCTL4 register. According to ECT_16B8C Block User Guide V01.06, pulse accumulator B (like pulse accumulator A) is also independent from timer enable bit (TEN).&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I don't know why do you want to access PACN3 and PACN2 in the same cycle. Pulse accumulator B uses concatenated 16bits register PACN1&lt;IMG alt=":smileytongue:" class="emoticon emoticon-smileytongue" id="smileytongue" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-tongue.gif" title="Smiley Tongue" /&gt;ACN0.&lt;/DIV&gt;&lt;DIV&gt;Try writing help and hit enter in CW command window. DW command seems to be what you need.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Dec 2008 16:40:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Issues-with-Timer-Module-Pulse-Accumulator-B-set-to-Event/m-p/213036#M8896</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2008-12-30T16:40:31Z</dc:date>
    </item>
  </channel>
</rss>

