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    <title>topic Re: Internal EEPROM Corruption in MC9S12XDP512 in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211330#M8778</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Crystal frequency = 8MHz&lt;BR /&gt;We are using PLL to make it 40MHz hence Bus Clock&amp;nbsp; = 20MHz&lt;BR /&gt;ECLKDIV = 0x2A&lt;BR /&gt;After calculation EECLK comes out to be 190kHz&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 19 Dec 2008 14:38:55 GMT</pubDate>
    <dc:creator>kp2309</dc:creator>
    <dc:date>2008-12-19T14:38:55Z</dc:date>
    <item>
      <title>Internal EEPROM Corruption in MC9S12XDP512</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211328#M8776</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hey guys&lt;/DIV&gt;&lt;DIV&gt;We are using MC9S12XDP512 controller for our existing product development.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The internal EEPROM of the controllers is getting corrupted permenantly in some cases.&lt;/DIV&gt;&lt;DIV&gt;It is not becoming default even after reprogramming the controller.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;It works fine and we are able to read and write properly for some time.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;We are using 190kHz frequency for EEPROM.&lt;/DIV&gt;&lt;DIV&gt;Also we are erasing the sectors before writing into EEPROM.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The product is in the last stage of release and suddenly we are facing such critical problem&lt;/DIV&gt;&lt;DIV&gt;Can anybody please tell me what are the areas which I should look in for finding the solution.&lt;/DIV&gt;&lt;DIV&gt;What can be the reasons for permenant corruption of EEPROM from hardware as well as software design point of view???&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Please reply&amp;nbsp;ASAP.&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;-Regards,&lt;/DIV&gt;&lt;DIV&gt;KP&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Dec 2008 19:44:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211328#M8776</guid>
      <dc:creator>kp2309</dc:creator>
      <dc:date>2008-12-18T19:44:16Z</dc:date>
    </item>
    <item>
      <title>Re: Internal EEPROM Corruption in MC9S12XDP512</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211329#M8777</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Sounds like bad ECLKDIV setting. Please tell us&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;1) what are your crystal (or external clock frequency) and bus clock frequencies.&lt;/DIV&gt;&lt;DIV&gt;2)&amp;nbsp;what's you code to set up ECLKDIV. If you don't want to show the code, then please read&amp;nbsp;contents of ECLKDIV register after setup&amp;nbsp;is done in normal mode (not using BDM).&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Dec 2008 21:22:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211329#M8777</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2008-12-18T21:22:26Z</dc:date>
    </item>
    <item>
      <title>Re: Internal EEPROM Corruption in MC9S12XDP512</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211330#M8778</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Crystal frequency = 8MHz&lt;BR /&gt;We are using PLL to make it 40MHz hence Bus Clock&amp;nbsp; = 20MHz&lt;BR /&gt;ECLKDIV = 0x2A&lt;BR /&gt;After calculation EECLK comes out to be 190kHz&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Dec 2008 14:38:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211330#M8778</guid>
      <dc:creator>kp2309</dc:creator>
      <dc:date>2008-12-19T14:38:55Z</dc:date>
    </item>
    <item>
      <title>Re: Internal EEPROM Corruption in MC9S12XDP512</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211331#M8779</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Setting is OK, but are you sure ECLKDIV is set up properly? So what's your code, or what do you read from ECLKDIV in normal mode? Look for&amp;nbsp;what Lundin replied here&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;A href="http://forums.freescale.com/freescale/board/message?board.id=16BITCOMM&amp;amp;message.id=2793&amp;amp;query.id=72910#M2793" target="_blank"&gt;http://forums.freescale.com/freescale/board/message?board.id=16BITCOMM&amp;amp;message.id=2793&amp;amp;query.id=72910#M2793&lt;/A&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Also, what did you mean by&lt;/DIV&gt;&lt;DIV&gt;&lt;EM&gt;&amp;nbsp;&amp;nbsp; It is not becoming default even after reprogramming the controller.&lt;/EM&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;EM&gt;&lt;/EM&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Does it mean EEPROM isn't erased during erase and reprogram over BDM? Well, if you didn't disable EEPROM erasure, then maybe&amp;nbsp;EEPROM erase/program limit was reached and&amp;nbsp;part is damaged?&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by kef on &lt;SPAN class="date_text"&gt;2008-12-19&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;10:41 AM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Dec 2008 16:28:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Internal-EEPROM-Corruption-in-MC9S12XDP512/m-p/211331#M8779</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2008-12-19T16:28:42Z</dc:date>
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