S12 / MagniV MicrocontrollersのトピックRTI stops working on MC9S12XEP100

RTI stops working on MC9S12XEP100

lak — Thu, 20 Nov 2008 19:46:55 GMT

Hi,

I have the RTI running successfully in my boot main configured for 1.024 ms. I use the following to set it

RTICTL = 0x1F; /* set RTI prescaler */

CRGINT = 0x80; /* enable RTI interrupts */
CRGFLG = 0x80; /* clear any pending RTIF */

Then, I use a unconditional jump to the application main where again RTI gets re configured to approx. 10 ms

RTICTL = 0x59;

CRGFLG_RTIF = 1;

CRGINT_RTIE = 1;

Also, before the above, the chip gets configured to NORMAL EXPANDED mode.

Even here the RTI works fine.

Again, when I jump from application to my boot main back, (the first code set again gets executed), the RTI stops working.Other interrupts work fine.I have set my IVBR register properly

However if I do a hard reset to return to boot main instead of jumping, the RTI works perfectly

In both the boot and appl, I am setting up the PLL clock to 40Mhz

I am at a loss to findout what am I missing out here, any initializations to be taken care of.

please advice.

with regards,

Lak

Re: RTI stops working on MC9S12XEP100

kef — Thu, 20 Nov 2008 20:25:20 GMT

Are you jumping back to boot from some of your interrupt service routine?

Re: RTI stops working on MC9S12XEP100

lak — Thu, 20 Nov 2008 20:29:50 GMT

Yes, this jump is from a task which gets executed in the RTI ISR. However before jumping, I disable the RTI and disable the interrupts too.

with regards,

Lak

Re: RTI stops working on MC9S12XEP100

kef — Thu, 20 Nov 2008 20:58:15 GMT

If it was S12, then jumping from ISR to start of bootloader, reinitializing SP and some peripherals could be enough. In S12X you also have to reset CPU CCR IPL bits to 0, and I guess you didn't? If so, then current priority level is >=1, and all interrupts that have priority <= IPL are inhibited.

BTW in ISR interrupts are already disabled, unless you reenable them with CLI allowing higher priority interrupts to interrupt current ISR.

Re: RTI stops working on MC9S12XEP100

lak — Fri, 21 Nov 2008 20:29:28 GMT

Kef,

your suggestion was very appropriate.

I had been indeed clearing the CCR by the instn ANDCC #0 however, the IPL bits are in the MSbyte of the CCR(CCRH), which I realised after your mail.

As i had been jumping from the RTI isr which had a priority level of 1 in appl main where we had nested interrupts, the CCR retains this level.

So once i jumped to boot, still the RTI carried a priority level of 1 and was not serviced since the current level in CCR and current RTI levels were same.

After clearing the CCRH thro TFR A,CCRH where i had cleared A earlier, RTI started working again.

thank you again for your advice.