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    <title>S12 / MagniV MicrocontrollersのトピックRe: Strange ram issue mc9s12x family</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203554#M8247</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;linker file is represented as follows,&lt;/P&gt;&lt;P&gt;default ram&lt;/P&gt;&lt;P&gt;into&lt;/P&gt;&lt;P&gt;ram,ram fd,ram fc;&lt;/P&gt;&lt;P&gt;so compiler fills all the global variables in non paged ram. Once non paged ram filled, compiler will start filling paged ram ram fd and ram fc.&lt;/P&gt;&lt;P&gt;so please refer the previous program n problem&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 09 Oct 2012 05:20:02 GMT</pubDate>
    <dc:creator>FIDDO</dc:creator>
    <dc:date>2012-10-09T05:20:02Z</dc:date>
    <item>
      <title>Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203545#M8238</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;WE are using mc9s12xeq512 family. Currently our ram size 32kb. &lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;consider a local variable which is in stack I.e non paged ram ( ram fe, Ram FF) multiplied with another global&amp;nbsp; variable in paged ram I.e ram FD. I'm didnt faced any issues and the operation was proper.&lt;/P&gt;&lt;P&gt;when the same local variable in stack (non paged ram) multiplied with variable placed in ram FC (paged ram). Multiplication done by micro controller is not proper.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class="j-rte-table"&gt;&lt;TABLE border="1" class="jiveBorder" style="border: 1px solid #000000;" width="100%"&gt;&lt;THEAD&gt;&lt;TR&gt;&lt;TH style="border:1px solid black;border: 1px solid #000000;padding: 2px;color: #ffffff;background-color: #6690bc;text-align: center;" valign="middle"&gt;&lt;STRONG&gt;Header 1&lt;/STRONG&gt;&lt;/TH&gt;&lt;TH style="border:1px solid black;border: 1px solid #000000;padding: 2px;color: #ffffff;background-color: #6690bc;text-align: center;" valign="middle"&gt;&lt;STRONG&gt;Header 2&lt;/STRONG&gt;&lt;/TH&gt;&lt;/TR&gt;&lt;/THEAD&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;ram&amp;nbsp; fa&lt;/TD&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;RAm fb&lt;/TD&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;RAm fc&lt;/TD&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;RAm fd&lt;/TD&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;PAgeD ram&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;RAm fe&lt;/TD&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;NOn pageD ram&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;RAm ff&lt;/TD&gt;&lt;TD style="border:1px solid black;border: 1px solid #000000;padding: 2px;"&gt;NOn&amp;nbsp; paged ram&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;this is a strange problem. is there any limitations on ram jumping in Freescale micro controller...?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt; uninitialised global variables is shows as .bss in&amp;nbsp; non paged ram and when the same global variable is placed in non paged ram why .bss doesn't picture.?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Sep 2012 17:35:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203545#M8238</guid>
      <dc:creator>FIDDO</dc:creator>
      <dc:date>2012-09-27T17:35:26Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203546#M8239</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Could you provide some code that demonstrates the problem?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is a very important compiler option -PSegObj/-PSegNonDef/-PSegAll. See in Code Generation tab "Assume object are in same page for".&lt;/P&gt;&lt;P&gt;Default setting is -PSegNonDef or "all objects in same non default segment". Here segment really means PRM PLACEMENT, PRM SEGMENT. Default PRM file has defined PAGED_RAM PLACEMENT, which consists of bunch of 4k RAM SEGMENT's. So -PSegNonDef is not really compatible with multipage PLACEMENT's, unless you are using only up to 4k of paged RAM, which would make linker allocating all paged RAM variables on the same page. If you are over 4k, then you either need to:&lt;/P&gt;&lt;P&gt;1) Use -PSegObj "never for different objects" setting&lt;/P&gt;&lt;P&gt;2) Edit PRM file and define different placements for different RPAGE - pages. Then try placing all variables first in first page. When linker complaing about no space in first page, move some variables to next page and so on.&lt;/P&gt;&lt;P&gt;1st way is maybe simpler, but 2nd makes compiler generating less and more faster code.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Some links that may help:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/63057"&gt;Re: Paged ram/ far pointers CW S12X&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/97128"&gt;Re: How to copy a 8 byte array from non banked ram to banked ram&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/109712"&gt;Re: RAM Paging in MC9S12XDT512&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/message/25439"&gt;Re: S12XDT256 and CW4.5: How to include one of the RAM pages in link map&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Sep 2012 07:17:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203546#M8239</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2012-09-28T07:17:15Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203547#M8240</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;ex:&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG&amp;nbsp; DEFAULT&lt;/P&gt;&lt;P&gt;unsigned int a=10;&lt;/P&gt;&lt;P&gt;unsigned int b;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;act()&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;b=a;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;case 1:&lt;/P&gt;&lt;P&gt;now consider that the freescale compiles and allocates both the variable in&amp;nbsp; ram i.e in banked memory i.e RAM FB. Current stack size is 1k. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;operation is proper &lt;/P&gt;&lt;P&gt;case 2:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;now consider that the freescale compiles and allocates both the variable in&amp;nbsp; ram i.e in banked memory i.e RAM FB. Current stack size is increased to 2k. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;operation is not proper ???............i mean value 'a' is not copied to 'b'&amp;nbsp; . Both variables are located in the same ram page (RAM FB) but in different locations.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. how increasing the stack size impacts the sytem?&lt;/P&gt;&lt;P&gt;2. is there any rules for handling variables in banked page?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 07 Oct 2012 18:53:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203547#M8240</guid>
      <dc:creator>FIDDO</dc:creator>
      <dc:date>2012-10-07T18:53:05Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203548#M8241</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1.&amp;nbsp; Is there any provision for clearing ram. Currently we are clearing ram only at the instant of battery off/on . Is it the best practise?...........&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; Is there any possibility of ram to corrupt, when a system continuously runs for a week&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 07 Oct 2012 18:57:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203548#M8241</guid>
      <dc:creator>FIDDO</dc:creator>
      <dc:date>2012-10-07T18:57:19Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203549#M8242</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Again, could you provide some code that demonstrates the problem? Your problem description is very fuzzy. I think we won't make any progress solving it, unless you show us some CW project that demonstrates the problem.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Oct 2012 12:00:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203549#M8242</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2012-10-08T12:00:38Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203550#M8243</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;#pragma DATA_SEG DEFAULT&lt;/P&gt;&lt;P&gt; unsigned int ECT_freq_l_U32 ;&lt;/P&gt;&lt;P&gt; unsigned int&amp;nbsp; FI ;&lt;/P&gt;&lt;P&gt;void Update_Frequency_module(){&lt;/P&gt;&lt;P&gt;ECT_freq_l_U32=&amp;nbsp;&amp;nbsp; 40/20;&lt;BR /&gt;FI= (unsigned long)ECT_freq_l_U32&amp;nbsp;&amp;nbsp; &lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;So just consider that the variables ECT_freq_l_U32 placed in one banked ram page FC&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;Variable FI is placed in another banked ram page FD&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;The entire function(Update_Frequency_module())&amp;nbsp; is placed in the is placed in paged flash . &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt; &lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;How the ppage register will be handled in this case?... whether this particular code will work?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt; &lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt; &lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Oct 2012 13:23:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203550#M8243</guid>
      <dc:creator>FIDDO</dc:creator>
      <dc:date>2012-10-08T13:23:04Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203551#M8244</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;BR /&gt;What memory model are you using? The most of users use banked memory model. In this memory model DATA_SEG DEFAULT makes variables allocated in nonpaged RAM only. It is not possible that ECT_.. is placed on page FC, and FI on page FD. Also PPAGE register has nothing in common with RAM paging on S12X. Like I said, your problem description is extremely fuzzy and not clear.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Oct 2012 14:21:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203551#M8244</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2012-10-08T14:21:14Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203552#M8245</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt; hmmm..... ur ri8 ... Sorry for putting fuzzy queries.... but i will continue to explain and sorry for not being clear!!! &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;all the global variables in our software model&amp;nbsp; comes under&lt;/P&gt;&lt;P&gt; #pragma&amp;nbsp; DATA_SEG default. We are using banked memory model.&amp;nbsp; We have loads of global variables which is around 10k. Thereby compiler starts accomodating the variable from&amp;nbsp; non-paged ram ( RAM FE,FF). Once its non paged rams are filled,&amp;nbsp; compiler starts&amp;nbsp; accomodates remaining&amp;nbsp; global variables(#pragma DATA_SEG default) in&amp;nbsp;&amp;nbsp; banked ram pages(RAM FD,RAM FC etc....................).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; now&amp;nbsp; ill add up my previous code&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG DEFAULT&lt;/P&gt;&lt;P&gt;unsigned int ECT_freq_l_U32 ;&lt;/P&gt;&lt;P&gt;unsigned int&amp;nbsp; FI ;&lt;/P&gt;&lt;P&gt;void Update_Frequency_module(){&lt;/P&gt;&lt;P&gt;ECT_freq_l_U32=&amp;nbsp;&amp;nbsp; 40/20;&lt;BR /&gt;FI= (unsigned long)ECT_freq_l_U32&amp;nbsp;&amp;nbsp; &lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;So just consider that the variables ECT_freq_l_U32 placed in one banked ram page 'FC'. &lt;/SPAN&gt;&lt;SPAN class="mce_paste_marker"&gt;Variable 'FI' is placed in another banked ram page 'FD' . Under this case, &lt;/SPAN&gt; whether there will any problem in page switching. My operation is not proper under this case!!!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Oct 2012 14:40:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203552#M8245</guid>
      <dc:creator>FIDDO</dc:creator>
      <dc:date>2012-10-08T14:40:17Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203553#M8246</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Did you change DEFAULT_RAM placement in PRM file? Originally it should look like this:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DEFAULT_RAM&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* all variables, the default RAM location */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; INTO&amp;nbsp; RAM;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If it is not touched, then compiler can't place variables in paged RAM! If indeed you changed it, then no wonder you have problems. You can't include paged RAM segments in DEFAULT_RAM placement when using BANKED memory model. Instead you should tell compiler which variables to allocate in paged RAM using DATA_SEG pragmas, like this&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG PAGED_RAM&lt;/P&gt;&lt;P&gt;// put here your paged RAM variables&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG DEFAULT&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When declaring global paged variables (extern's in *.h file), they also should be put between DATA_SEG pragmas. For example global paged var1 can be defined in C file&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG PAGED_RAM&lt;/P&gt;&lt;P&gt;char var1;&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG DEFAULT&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt; &lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;and declared in *.h file:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;#pragma DATA_SEG PAGED_RAM&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;extern char var1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;#pragma DATA_SEG DEFAULT&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Oct 2012 15:03:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203553#M8246</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2012-10-08T15:03:48Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203554#M8247</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;linker file is represented as follows,&lt;/P&gt;&lt;P&gt;default ram&lt;/P&gt;&lt;P&gt;into&lt;/P&gt;&lt;P&gt;ram,ram fd,ram fc;&lt;/P&gt;&lt;P&gt;so compiler fills all the global variables in non paged ram. Once non paged ram filled, compiler will start filling paged ram ram fd and ram fc.&lt;/P&gt;&lt;P&gt;so please refer the previous program n problem&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Oct 2012 05:20:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203554#M8247</guid>
      <dc:creator>FIDDO</dc:creator>
      <dc:date>2012-10-09T05:20:02Z</dc:date>
    </item>
    <item>
      <title>Re: Strange ram issue mc9s12x family</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203555#M8248</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;BLOCKQUOTE&gt;
&lt;P&gt;linker file is represented as follows,&lt;/P&gt;
&lt;P&gt;default ram&lt;/P&gt;
&lt;P&gt;into&lt;/P&gt;
&lt;P&gt;ram,ram fd,ram fc;&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;P&gt; You can't do this. Paged RAM can't be included in default RAM placement.&lt;/P&gt;&lt;BLOCKQUOTE&gt;
&lt;P&gt;so compiler fills all the global variables in non paged ram. Once non paged ram filled, compiler will start filling paged ram ram fd and ram fc.&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;&lt;P&gt;Linker does what you ask it, it puts stack and your variables first to non paged RAM, then to paged RAM segments FD and FC. But unfortunately this is not enough for compiler to generate proper code to access objects in paged memory.&lt;/P&gt;&lt;P&gt;You need to restore PRM file to original and use #pragma DATA_SEG to tell compiler 1) what objects are paged, 2) how compiler should access them, 3) and what placement to allocate object to.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1) To tell what variables, declare and define variables between these pragmas&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG ...&lt;/P&gt;&lt;P&gt; // put your paged variables here&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG DEFAULT&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2) to tell how compiler should access them, use either __RPAGE_SEG or __GPAGE_SEG attribute (which I missed in my previous message). Paged RAM is accessed either switching RPAGE register, or using global memory addressing and switching GPAGE register. So&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG &lt;STRONG&gt;__RPAGE_SEG&lt;/STRONG&gt;&amp;nbsp; ...&lt;/P&gt;&lt;P&gt; // put your paged variables here&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG DEFAULT&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3) to tell what PRM PLACEMENT to use:&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG __RPAGE_SEG&amp;nbsp; &lt;STRONG&gt;PAGED_RAM&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt; // put your paged variables here&lt;/P&gt;&lt;P&gt;#pragma DATA_SEG DEFAULT&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Oct 2012 06:55:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Strange-ram-issue-mc9s12x-family/m-p/203555#M8248</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2012-10-09T06:55:33Z</dc:date>
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