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    <title>S12 / MagniV MicrocontrollersのトピックRe: Problems writing to paged ram on an HC12</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Problems-writing-to-paged-ram-on-an-HC12/m-p/192779#M7593</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I think the problem is that pointers to far data use global addressing GPAGE+16bit G-page offset. And you specified your addresses using RPAGE + 16bit cpu local address. For example 0xFA1000 is RPAGE=0xFA, and CPU local address 0x1000. I don't know how familiar you are with this, but try converting RPAGE RAM addresses to GPAGE RAM addresses, like this&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;#define RPAGE2GPAGE(x) ((x&amp;amp;0xFFF) |&amp;nbsp; ((x&amp;gt;&amp;gt;4)&amp;amp;0xFF000))&lt;/P&gt;&lt;P&gt;INT16U *__far startAddress = (INT16U*__far) RPAGE2GPAGE(0xFA1000);&lt;BR /&gt;INT16U *__far endAddress = (INT16U*__far) RPAGE2GPAGE(0xFC1FFF);&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 23 Jun 2009 03:40:39 GMT</pubDate>
    <dc:creator>kef</dc:creator>
    <dc:date>2009-06-23T03:40:39Z</dc:date>
    <item>
      <title>Problems writing to paged ram on an HC12</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Problems-writing-to-paged-ram-on-an-HC12/m-p/192778#M7592</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am a using CodeWarrior version 5.7.0 with an MC9S12XDP512 processor.&lt;BR /&gt;&lt;BR /&gt;I am trying to reserve 3 pages of paged RAM (FA, FB and FC) that will be accessed only by using far pointers.&amp;nbsp; Basically I have a very basic file system that sequentially stores data to those pages of RAM and I want to be able to access that data later without it being overwritten.&amp;nbsp; Whenever i try to write to memory, the contents of the memory say they are undefined.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have declared the start addresses of my file system like this:&lt;BR /&gt;&lt;BR /&gt;INT16U *__far startAddress = (INT16U*__far) 0xFA1000;&lt;BR /&gt;INT16U *__far endAddress = (INT16U*__far) 0xFC1FFF;&lt;BR /&gt;INT16U *__far currentAddress;&lt;BR /&gt;&lt;BR /&gt;The addresses of each page are in the .prm file like this:&lt;BR /&gt;&lt;BR /&gt;RAM_FA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = READ_WRITE&amp;nbsp; 0xFA1000 TO 0xFA1FFF ALIGN 2[1:1];&lt;BR /&gt;RAM_FB&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = READ_WRITE&amp;nbsp; 0xFB1000 TO 0xFB1FFF ALIGN 2[1:1];&lt;BR /&gt;RAM_FC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = READ_WRITE&amp;nbsp; 0xFC1000 TO 0xFC1FFF ALIGN 2[1:1];&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;These 3 pages are reserved in this way:&lt;/P&gt;&lt;P&gt;&amp;nbsp;PAGED_RAM&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* paged data accessed by CPU12 only */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; INTO&amp;nbsp;&amp;nbsp; RAM_FC, RAM_FB, RAM_FA;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;One page was reserved for the X-Gate processor:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; XGATE_STRING_RAM,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; XGATE_CONST_RAM,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; XGATE_CODE_RAM,&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; XGATE_DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; INTO&amp;nbsp; RAM_F8;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;This is how I am writing to memory and initializing the pointer:&lt;/P&gt;&lt;P&gt;&amp;nbsp; currentAddress = startAddress;&amp;nbsp;&amp;nbsp; //initialize the currentaddress pointer to the beginning of page A&lt;/P&gt;&lt;P&gt;*currentAddress = variable;&amp;nbsp; //write data to the current address in ram&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In the debugger it says that *currentAddress = undefined.&amp;nbsp; Any ideas why I can't write to paged RAM?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2009 00:23:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Problems-writing-to-paged-ram-on-an-HC12/m-p/192778#M7592</guid>
      <dc:creator>CJTill</dc:creator>
      <dc:date>2009-06-23T00:23:28Z</dc:date>
    </item>
    <item>
      <title>Re: Problems writing to paged ram on an HC12</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Problems-writing-to-paged-ram-on-an-HC12/m-p/192779#M7593</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I think the problem is that pointers to far data use global addressing GPAGE+16bit G-page offset. And you specified your addresses using RPAGE + 16bit cpu local address. For example 0xFA1000 is RPAGE=0xFA, and CPU local address 0x1000. I don't know how familiar you are with this, but try converting RPAGE RAM addresses to GPAGE RAM addresses, like this&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;#define RPAGE2GPAGE(x) ((x&amp;amp;0xFFF) |&amp;nbsp; ((x&amp;gt;&amp;gt;4)&amp;amp;0xFF000))&lt;/P&gt;&lt;P&gt;INT16U *__far startAddress = (INT16U*__far) RPAGE2GPAGE(0xFA1000);&lt;BR /&gt;INT16U *__far endAddress = (INT16U*__far) RPAGE2GPAGE(0xFC1FFF);&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2009 03:40:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Problems-writing-to-paged-ram-on-an-HC12/m-p/192779#M7593</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2009-06-23T03:40:39Z</dc:date>
    </item>
    <item>
      <title>Re: Problems writing to paged ram on an HC12</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Problems-writing-to-paged-ram-on-an-HC12/m-p/192780#M7594</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Ok, thanks I see what I need to do now.&amp;nbsp; I will need to change the RPAGE register to write to the correct location.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2009 04:24:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Problems-writing-to-paged-ram-on-an-HC12/m-p/192780#M7594</guid>
      <dc:creator>CJTill</dc:creator>
      <dc:date>2009-06-23T04:24:04Z</dc:date>
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