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    <title>S12 / MagniV MicrocontrollersのトピックInterfacing 595 Shift Register with 7-Segment</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interfacing-595-Shift-Register-with-7-Segment/m-p/191064#M7459</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am trying to interface a 595 shift register to drive a 7 segment display as part of my groups senior project. &amp;nbsp;Our goal is to cascade three shift registers together to make a 3 digit display. &amp;nbsp;We are going to take body measurements for heartrate and body temperature (and time permitting blood pressure) and display them on the 7 segments. &amp;nbsp;This means that we will have to drive four, three digit displays. &amp;nbsp;Is it possible to drive up to four displays using what I have with the dragon board? I have been working on some code for it but am very unsure of the direction I should be taking. &amp;nbsp;I have been studying the SPI port because that seems to be the way to drive it. &amp;nbsp;I am using the MC9S12DG256, hcs912 based board. &amp;nbsp;Here is the code from my main program:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;/****************************************************************&lt;/DIV&gt;&lt;DIV&gt;*&lt;/DIV&gt;&lt;DIV&gt;* &amp;nbsp; &amp;nbsp;Senior Project&lt;/DIV&gt;&lt;DIV&gt;* &amp;nbsp; &amp;nbsp;Interfacing 7 segment display&lt;/DIV&gt;&lt;DIV&gt;*&lt;/DIV&gt;&lt;DIV&gt;****************************************************************/&lt;/DIV&gt;&lt;DIV&gt;#include &amp;lt;hidef.h&amp;gt; &amp;nbsp; &amp;nbsp; &amp;nbsp;/* common defines and macros */&lt;/DIV&gt;&lt;DIV&gt;#include "derivative.h" &amp;nbsp; &amp;nbsp; &amp;nbsp;/* derivative-specific definitions */&lt;/DIV&gt;&lt;DIV&gt;#include "delays.h"&lt;/DIV&gt;&lt;DIV&gt;#include "spi0util.h"&lt;/DIV&gt;&lt;DIV&gt;void set24MHzClock( void );&lt;/DIV&gt;&lt;DIV&gt;void delay( void );&lt;/DIV&gt;&lt;DIV&gt;void openspi0(void);&lt;/DIV&gt;&lt;DIV&gt;void main(void)&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;char i;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;unsigned char disp_tab[8][2] =&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;{{0x80,0x7F},{0x40,0x70},{0x20,0x5F},{0x10,0x5B},&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {0x08,0x33},{0x04,0x79},{0x02,0x6D},{0x01,0x30}};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;set24MHzClock( );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;openspi0(); &amp;nbsp; // configure the SPI0 module&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;while( 1 )&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; DDRK |= 0x40; // configure pin PK7 as output&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; while(1)&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; {&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; for (i = 0; i &amp;lt; 8; i++)&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; putcspi0(disp_tab[i][0]); &amp;nbsp;// send out digit select value&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; putcspi0(disp_tab[i][1]); &amp;nbsp;// send out segment pattern&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PORTK &amp;amp;= ~0x40; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;// load value into latch of 74HC595s&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PORTK |= 0x40; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; // "&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; delay1_6ms(); &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; // display a digit for 1 ms&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;/*---------------------------------------------------------------------------&lt;/DIV&gt;&lt;DIV&gt;- set24MHzClock&lt;/DIV&gt;&lt;DIV&gt;-&lt;/DIV&gt;&lt;DIV&gt;- Sets up phase-locked-loop and clock source, etc., for 24 MHz operation&lt;/DIV&gt;&lt;DIV&gt;-&lt;/DIV&gt;&lt;DIV&gt;- OSC = oscillator clock frequency = 8 MHz&lt;/DIV&gt;&lt;DIV&gt;- PLLCLK = Phase-Locked-Loop Clock frequency, which we want to be 24 MHz&lt;/DIV&gt;&lt;DIV&gt;- According to the Clock and Reset Generation (CRG) documentation the&lt;/DIV&gt;&lt;DIV&gt;- &lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;formula for the PLLCLK based on OSC is:&lt;/DIV&gt;&lt;DIV&gt;- PLLCLK = OSC X 2 X (SYNR + 1) / (REFDV + 1)&lt;/DIV&gt;&lt;DIV&gt;-&lt;SPAN&gt;&lt;/SPAN&gt;OSC (8MHz) must be multiplied by 6 to get 24 MHz, so select values&lt;/DIV&gt;&lt;DIV&gt;-&lt;SPAN&gt;&lt;/SPAN&gt;for SYNR &amp;amp; REFDV so that (SYNR + 1) / (REFDV + 1) = 3/1 = 3&lt;/DIV&gt;&lt;DIV&gt;-&lt;SPAN&gt;&lt;/SPAN&gt;This code uses SYNR = 1 &amp;amp; REFDV = 0&lt;/DIV&gt;&lt;DIV&gt;----------------------------------------------------------------------------*/&lt;/DIV&gt;&lt;DIV&gt;void set24MHzClock(void)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; CLKSEL = 0; &amp;nbsp; &amp;nbsp;// Use crystal oscillator for E clock&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; PLLCTL = 0; &amp;nbsp; &amp;nbsp;// PLL off&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; SYNR &amp;nbsp; = 2; &amp;nbsp; &amp;nbsp;// Set (SYNR + 1) / (REFDV) = 3 ...&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; REFDV &amp;nbsp;= 0; &amp;nbsp; &amp;nbsp;// ... see equation in prologue&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; PLLCTL = 0x40; // PLL on&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; while( !( CRGFLG &amp;amp; 8) )&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; { } &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;// Wait for lock-up&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; CLKSEL = 0x80; // Switch to PLL for system clock&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;/*---------------------------------------------------------------------------&lt;/DIV&gt;&lt;DIV&gt;- openspi0&lt;/DIV&gt;&lt;DIV&gt;-&lt;/DIV&gt;&lt;DIV&gt;----------------------------------------------------------------------------*/&lt;/DIV&gt;&lt;DIV&gt;void openspi0(void)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; SPI0BR &amp;nbsp;= 0; &amp;nbsp; &amp;nbsp;// set baud rate to 12 MHz&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; SPI0CR1 = 0x50; // disable SPI interrupt, enable SPI, SCK idle low, shift&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; // &amp;nbsp; data on rising edge, shift data msb first&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; SPI0CR2 = 0x02; // disable bidirection mode, disable SPI in wait mode&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; WOMS &amp;nbsp; &amp;nbsp;= 0; &amp;nbsp; &amp;nbsp;// enable Port S pull up&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have included a zipped file with all my work including all my functions, datasheets for the shift register and 7 segment display. &amp;nbsp;Please take a look, right now I have no guidance software wise on how to do this and will greatly&amp;nbsp;appreciate&amp;nbsp;any help that I can get.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 14 Mar 2011 08:21:26 GMT</pubDate>
    <dc:creator>LinkyPwns</dc:creator>
    <dc:date>2011-03-14T08:21:26Z</dc:date>
    <item>
      <title>Interfacing 595 Shift Register with 7-Segment</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interfacing-595-Shift-Register-with-7-Segment/m-p/191064#M7459</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am trying to interface a 595 shift register to drive a 7 segment display as part of my groups senior project. &amp;nbsp;Our goal is to cascade three shift registers together to make a 3 digit display. &amp;nbsp;We are going to take body measurements for heartrate and body temperature (and time permitting blood pressure) and display them on the 7 segments. &amp;nbsp;This means that we will have to drive four, three digit displays. &amp;nbsp;Is it possible to drive up to four displays using what I have with the dragon board? I have been working on some code for it but am very unsure of the direction I should be taking. &amp;nbsp;I have been studying the SPI port because that seems to be the way to drive it. &amp;nbsp;I am using the MC9S12DG256, hcs912 based board. &amp;nbsp;Here is the code from my main program:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;/****************************************************************&lt;/DIV&gt;&lt;DIV&gt;*&lt;/DIV&gt;&lt;DIV&gt;* &amp;nbsp; &amp;nbsp;Senior Project&lt;/DIV&gt;&lt;DIV&gt;* &amp;nbsp; &amp;nbsp;Interfacing 7 segment display&lt;/DIV&gt;&lt;DIV&gt;*&lt;/DIV&gt;&lt;DIV&gt;****************************************************************/&lt;/DIV&gt;&lt;DIV&gt;#include &amp;lt;hidef.h&amp;gt; &amp;nbsp; &amp;nbsp; &amp;nbsp;/* common defines and macros */&lt;/DIV&gt;&lt;DIV&gt;#include "derivative.h" &amp;nbsp; &amp;nbsp; &amp;nbsp;/* derivative-specific definitions */&lt;/DIV&gt;&lt;DIV&gt;#include "delays.h"&lt;/DIV&gt;&lt;DIV&gt;#include "spi0util.h"&lt;/DIV&gt;&lt;DIV&gt;void set24MHzClock( void );&lt;/DIV&gt;&lt;DIV&gt;void delay( void );&lt;/DIV&gt;&lt;DIV&gt;void openspi0(void);&lt;/DIV&gt;&lt;DIV&gt;void main(void)&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;char i;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;unsigned char disp_tab[8][2] =&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;{{0x80,0x7F},{0x40,0x70},{0x20,0x5F},{0x10,0x5B},&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {0x08,0x33},{0x04,0x79},{0x02,0x6D},{0x01,0x30}};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;set24MHzClock( );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;openspi0(); &amp;nbsp; // configure the SPI0 module&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;while( 1 )&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; DDRK |= 0x40; // configure pin PK7 as output&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; while(1)&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; {&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; for (i = 0; i &amp;lt; 8; i++)&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; putcspi0(disp_tab[i][0]); &amp;nbsp;// send out digit select value&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; putcspi0(disp_tab[i][1]); &amp;nbsp;// send out segment pattern&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PORTK &amp;amp;= ~0x40; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;// load value into latch of 74HC595s&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PORTK |= 0x40; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; // "&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; delay1_6ms(); &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; // display a digit for 1 ms&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;/*---------------------------------------------------------------------------&lt;/DIV&gt;&lt;DIV&gt;- set24MHzClock&lt;/DIV&gt;&lt;DIV&gt;-&lt;/DIV&gt;&lt;DIV&gt;- Sets up phase-locked-loop and clock source, etc., for 24 MHz operation&lt;/DIV&gt;&lt;DIV&gt;-&lt;/DIV&gt;&lt;DIV&gt;- OSC = oscillator clock frequency = 8 MHz&lt;/DIV&gt;&lt;DIV&gt;- PLLCLK = Phase-Locked-Loop Clock frequency, which we want to be 24 MHz&lt;/DIV&gt;&lt;DIV&gt;- According to the Clock and Reset Generation (CRG) documentation the&lt;/DIV&gt;&lt;DIV&gt;- &lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;formula for the PLLCLK based on OSC is:&lt;/DIV&gt;&lt;DIV&gt;- PLLCLK = OSC X 2 X (SYNR + 1) / (REFDV + 1)&lt;/DIV&gt;&lt;DIV&gt;-&lt;SPAN&gt;&lt;/SPAN&gt;OSC (8MHz) must be multiplied by 6 to get 24 MHz, so select values&lt;/DIV&gt;&lt;DIV&gt;-&lt;SPAN&gt;&lt;/SPAN&gt;for SYNR &amp;amp; REFDV so that (SYNR + 1) / (REFDV + 1) = 3/1 = 3&lt;/DIV&gt;&lt;DIV&gt;-&lt;SPAN&gt;&lt;/SPAN&gt;This code uses SYNR = 1 &amp;amp; REFDV = 0&lt;/DIV&gt;&lt;DIV&gt;----------------------------------------------------------------------------*/&lt;/DIV&gt;&lt;DIV&gt;void set24MHzClock(void)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; CLKSEL = 0; &amp;nbsp; &amp;nbsp;// Use crystal oscillator for E clock&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; PLLCTL = 0; &amp;nbsp; &amp;nbsp;// PLL off&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; SYNR &amp;nbsp; = 2; &amp;nbsp; &amp;nbsp;// Set (SYNR + 1) / (REFDV) = 3 ...&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; REFDV &amp;nbsp;= 0; &amp;nbsp; &amp;nbsp;// ... see equation in prologue&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; PLLCTL = 0x40; // PLL on&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; while( !( CRGFLG &amp;amp; 8) )&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; { } &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;// Wait for lock-up&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; CLKSEL = 0x80; // Switch to PLL for system clock&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;/*---------------------------------------------------------------------------&lt;/DIV&gt;&lt;DIV&gt;- openspi0&lt;/DIV&gt;&lt;DIV&gt;-&lt;/DIV&gt;&lt;DIV&gt;----------------------------------------------------------------------------*/&lt;/DIV&gt;&lt;DIV&gt;void openspi0(void)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; SPI0BR &amp;nbsp;= 0; &amp;nbsp; &amp;nbsp;// set baud rate to 12 MHz&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; SPI0CR1 = 0x50; // disable SPI interrupt, enable SPI, SCK idle low, shift&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; // &amp;nbsp; data on rising edge, shift data msb first&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; SPI0CR2 = 0x02; // disable bidirection mode, disable SPI in wait mode&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; WOMS &amp;nbsp; &amp;nbsp;= 0; &amp;nbsp; &amp;nbsp;// enable Port S pull up&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have included a zipped file with all my work including all my functions, datasheets for the shift register and 7 segment display. &amp;nbsp;Please take a look, right now I have no guidance software wise on how to do this and will greatly&amp;nbsp;appreciate&amp;nbsp;any help that I can get.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 Mar 2011 08:21:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interfacing-595-Shift-Register-with-7-Segment/m-p/191064#M7459</guid>
      <dc:creator>LinkyPwns</dc:creator>
      <dc:date>2011-03-14T08:21:26Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing 595 Shift Register with 7-Segment</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interfacing-595-Shift-Register-with-7-Segment/m-p/191065#M7460</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, and welcome to the forum.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Firstly, your choice of a large format, 7-segment LED&amp;nbsp;display type will create considerable interface difficulties, to the extent that you would need to use&amp;nbsp;special high voltage interface devices, in addition to the shift registers.&amp;nbsp; This is because the displays you have chosen have four series connected diodes for each segment, resulting in a maximum voltage drop requirement of 10 volts (8.4 volts typical).&amp;nbsp; The supply voltage to these displays will need to be considerably greater than the maximum drop, especially if using series resistors&amp;nbsp; to limit segment current.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;To simplify the college project, I suggest that you use a smaller LED display type, with only a single LED per segment, so that a 5 volt supply may be used for the display.&amp;nbsp; If directly driving each segment from the 595 output, you would need to limit to about 5 mA per segment using a series resistor for each segment.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Since you would need a separate 595 device for each display, making a total of 12 packages, and 96 resistors, you may also wish to consider other approaches that result in less additional hardware.&amp;nbsp; Special multiplexed LED driver packages are available.&amp;nbsp; One that comes to mind is the Maxim MAX7219/MAX7221 type.&amp;nbsp; Each package is capable of handling up to eight digits, and is SPI compatible.&amp;nbsp; You would need two packages for the current project, and a total of two resistors to set the segment current.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Should you decide to stay with using the 595 devices, you will need to decide whether you handle the update data for twelve digits as a single 12-byte sequence, or as four separate 3-byte sequences (i.e. updating one 3-digit&amp;nbsp;display at a time).&amp;nbsp; In the first case you would need a single strobe output to pin 12 of all packages, connected in parallel.&amp;nbsp; For the second alternative, there would need to be a separate strobe output to each 3-digit group.&amp;nbsp; The strobe pulse(s) would be generated by your code at the completion of each data sequence.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am unclear as to the&amp;nbsp;operation of your disp_tab[][] two-dimensional array.&amp;nbsp; Are the 595 connections to each 7-segment display identical for each digit, or do the connections differ from digit to digit?&amp;nbsp; Do the connections for each 3-digit display follow a simiar pattern?&amp;nbsp; I might have expected one of the array dimensions to have a size of at least ten, to provide an index to&amp;nbsp;all the numeric characters.&amp;nbsp; You will likely also need to define a blank display state, and maybe you will also need to handle a limited range of alphabetic characters, or other symbols.&amp;nbsp; These would require further positions within the table.&amp;nbsp; I would assume that the DP state would be handled from outside the table.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For example, if there happened to be identical 595 connections to each digit, and you had four separate&amp;nbsp;sequences of three digits, I might have expected a single dimension array to reflect the output pattern for each numeral.&amp;nbsp; You would then successively&amp;nbsp;send the output pattern corresponding to each of the three digits, either LSD or MSD first, depending on the 595 daisy-chaining sequence.&amp;nbsp; Finally you would generate a short strobe pulse to update the output latches.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 Mar 2011 19:06:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interfacing-595-Shift-Register-with-7-Segment/m-p/191065#M7460</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2011-03-14T19:06:10Z</dc:date>
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