<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: Interrupts - MC9S12XDT512MAA in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188591#M7221</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;SWI does not need to be enabled or disabled and there is no flag clearing required - see the SWI instruction in the CPU glossary for more info.&lt;/DIV&gt;&lt;DIV&gt;If you need more control or more software interrupts you can use the XGATE software triggers (there are 8 in the XGSWT&amp;nbsp;register) but remember to direct them to the CPU. In that case you will need to enable interrupts (CLI) and clear the relevant flag on completion.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 12 Feb 2008 21:39:19 GMT</pubDate>
    <dc:creator>Steve</dc:creator>
    <dc:date>2008-02-12T21:39:19Z</dc:date>
    <item>
      <title>Interrupts - MC9S12XDT512MAA</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188588#M7218</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;are there software interrupts (!= hardware interrupts like, signal rises to high on a port) existing on a MC9S12XDT512MAA?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;cu&lt;/SPAN&gt;&lt;BR /&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Added p/n to subject.&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Message Edited by NLFSJ on &lt;/SPAN&gt;&lt;SPAN class="date_text"&gt;2008-02-11&lt;/SPAN&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;SPAN class="time_text"&gt;01:55 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 11 Feb 2008 22:23:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188588#M7218</guid>
      <dc:creator>Gerald1</dc:creator>
      <dc:date>2008-02-11T22:23:54Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupts - MC9S12XDT512MAA</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188589#M7219</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Hello&lt;BR /&gt;&lt;BR /&gt;There is indeed a software interrupt available on this device in the form of the SWI instruction.&lt;BR /&gt;This is a non-maskable interrupt and is listed in the interrupt vector table on page 73 of the S12XD-Family reference manual.&lt;BR /&gt;It is described in more detail on page 351 of the associated CPU reference manual at.....&lt;BR /&gt;&lt;A href="http://www.freescale.com/files/microcontrollers/doc/ref_manual/S12XCPUV1.pdf?fpsp=1" target="test_blank"&gt;http://www.freescale.com/files/microcontrollers/doc/ref_manual/S12XCPUV1.pdf?fpsp=1&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;DPB&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2008 17:05:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188589#M7219</guid>
      <dc:creator>DPB</dc:creator>
      <dc:date>2008-02-12T17:05:04Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupts - MC9S12XDT512MAA</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188590#M7220</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;i am using the codewarrior c-compiler.&lt;BR /&gt;&lt;BR /&gt;in the headerfile (mc9s12xdt512.h) i saw:&lt;BR /&gt;/**************** interrupt vector table ****************/&lt;BR /&gt;#define Vswi&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0000FFF6&lt;BR /&gt;&lt;BR /&gt;//---------------------------------------------------------------&lt;BR /&gt;//my code:&lt;BR /&gt;&lt;BR /&gt;#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module.&lt;BR /&gt;&lt;BR /&gt;interrupt void Vswi(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // ...code...&lt;BR /&gt;}&lt;BR /&gt;&lt;BR /&gt;#pragma CODE_SEG DEFAULT&lt;BR /&gt;&lt;BR /&gt;how should i enable swi interrupt by using -&amp;gt; EnableInterrupts?&lt;BR /&gt;and how could i set and clear the swi interrupt?&lt;BR /&gt;&lt;BR /&gt;bye&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2008 17:56:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188590#M7220</guid>
      <dc:creator>Gerald1</dc:creator>
      <dc:date>2008-02-12T17:56:32Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupts - MC9S12XDT512MAA</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188591#M7221</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;SWI does not need to be enabled or disabled and there is no flag clearing required - see the SWI instruction in the CPU glossary for more info.&lt;/DIV&gt;&lt;DIV&gt;If you need more control or more software interrupts you can use the XGATE software triggers (there are 8 in the XGSWT&amp;nbsp;register) but remember to direct them to the CPU. In that case you will need to enable interrupts (CLI) and clear the relevant flag on completion.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2008 21:39:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188591#M7221</guid>
      <dc:creator>Steve</dc:creator>
      <dc:date>2008-02-12T21:39:19Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupts - MC9S12XDT512MAA</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188592#M7222</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;BR /&gt;Also be aware that some Freescale debuggers use SWI for code running in ram and that some RTK's use it to switch task (UCOS for sure).&lt;BR /&gt;&lt;BR /&gt;You may wish to find another mechanism to accomplish this.&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2008 21:44:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Interrupts-MC9S12XDT512MAA/m-p/188592#M7222</guid>
      <dc:creator>JimDon</dc:creator>
      <dc:date>2008-02-12T21:44:03Z</dc:date>
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  </channel>
</rss>

