topic Re: co-relation between instruction and clock/bus cycle in S12 / MagniV Microcontrollers

co-relation between instruction and clock/bus cycle

applejuice5 — Tue, 11 Jan 2011 19:50:19 GMT

for S12 family there is mentioned core clock and bus clock, which is half the core clock.

now each instruction cycle is one bus clock or core clock ?

Re: co-relation between instruction and clock/bus cycle

kef — Tue, 11 Jan 2011 21:29:00 GMT

Shortest instruction (like NOP) take one bus cycle.

Re: co-relation between instruction and clock/bus cycle

jsmcortina — Wed, 26 Jan 2011 20:51:11 GMT

If you haven't already seen it, then take a look at the S12XCPU datasheet. That lists each instruction and its cycle count.

Looks like S12XCPUV1.pdf is still the current version.

James

Re: co-relation between instruction and clock/bus cycle

MJW — Tue, 01 Feb 2011 18:37:23 GMT

Hello,

the correct version of the CPU reference manual depends on the actual MCU family used:

* most S12 devices generally refer to the S12CPUV2 Reference Manual (S12CPUV2.pdf, latest Rev as of today: 4.0)

* some S12X (e.g. S12XD) refer to the S12XCPUV1 Reference Manual (S12XCPUV1.pdf, latest Rev as of today: 1.01)

* most S12X (e.g. S12XS, S12XF, S12XE) and recent S12 devices (e.g. S12P) refer to the CPU12/CPU12X Reference Manual (S12XCPUV2.pdf, latest Rev as of today:1.03)

This last document mentioned above actually describes the all existing ISA versions for CPU12 and CPU12X.

HTH,

MJW