S12 / MagniV Microcontrollersのトピック9S12XEP100 with a simple RTI initialization

9S12XEP100 with a simple RTI initialization

nocturnalHippoz — Sat, 23 Jun 2012 03:43:32 GMT

Hi everyone,

I'm having a bit of a problem with initializating the RTI on the 9S12XEP100 chip. Enclosed with this Email is a copy of the code. The error that I'm receiving during compiling is:

"L1907: Fixup overflow in_Vector_7, to rti_isr type 1, at offset 0x0"

At first, I thought I was addressing off the wrong vector address but opening the the vector map in the .h file shows that the Vrti is at 7. Does anyone have any ideas or recommendations? Thank you in advance.

Sincerely,

Ron.

Re: 9S12XEP100 with a simple RTI initialization

CompilerGuru — Sat, 23 Jun 2012 11:13:15 GMT

Interrupt handlers must be explicitely allocates in NON_BANKED in the banked memory model.

Search for NON_BANKED and interrupt in the forum, e.g. here is a sample use, there are many others:

https://community.freescale.com/message/73150#73150

Daniel

Re: 9S12XEP100 with a simple RTI initialization

nocturnalHippoz — Tue, 26 Jun 2012 02:04:09 GMT

Thank you!