topic Re: S12X:PIT timeout calculation in S12 / MagniV Microcontrollers

S12X:PIT timeout calculation

JadhavAj — Thu, 20 Dec 2007 19:04:47 GMT

Hi,

As per S12X datasheet, for PIT channels, time-out period = (PITMTLD + 1) * (PITLD + 1) / fBUS.

For fBUS=2MHz, if PITMTLD =0 and PITLD =0, expected timeout period is 0.5 microseconds.if PITMTLD =0 and PITLD =1, expected timeout period is 1 microseconds.

It is not clear how will PITCNT will count down for PITMTLD =0 and PITLD =0 values, how does count down differ when PITMTLD =0 and PITLD =1?

Regards,

Ajay

Re: S12X:PIT timeout calculation

Xzidax — Fri, 21 Dec 2007 20:54:50 GMT

Hi,

In S12X family if we take the example of MC9S12XEP100 datasheet, under the section 17.4.1 it is mentioned. According to that for the condition PITMTLD =0 and PITLD =0, PITCNT will be 0(zero). But this should hold for a bus clock amount of time. After time out interrupt should occur. For the condition PITMTLD =0 and PITLD =1, PITCNT should downcount from 1 to 0. When PITCNT = 1 should hold for one bus clock and similarly PITCNT = 0 also should hold for one bus clock. So in that case it will take two bus clock for time out and interrupt occur.

Regards

Xzidax