S12 / MagniV MicrocontrollersのトピックRe: SPI port failure

SPI port failure

SSK — Wed, 12 Dec 2007 15:30:11 GMT

Hi Forum Members,

I am using MC9S12A128 in one of my projects. I am using its SPI interface to communicate with MC68HC908AP16. The SPI communication works fine but sometimes it is found that the SPI port of MC9S12A128 fails to communicate and in turn it is found that the SPI port itself is of no use. The controller as such works fine except SPI port. What could be the possible reason(s) for this? Whether any care is needed from hardware/software design point of view for SPI?

Your earliest help in this regard will be highly appreciated.

Thanks in advance.

Re: SPI port failure

bigmac — Wed, 12 Dec 2007 16:01:47 GMT

Hello, and welcome to the forum.

If one of the SPI flags is not cleared, an overrun condition can occur, that may prevent further communications. Do you regain some communications after a reset? You will need to post more details on what you are attempting ot achieve, and on the nature of your problem. Preferably also post your SPI communications code for both master and slave.

If you also search the forums, you will find many code examples for SPI master communications (but far fewer for slave operation). Do not ignore the 8-bit forum because the SPI modules for 9S12 and 9S08 devices are quite similar.

Regards,

Mac

Re: SPI port failure

SSK — Wed, 12 Dec 2007 17:05:47 GMT

Hi Mac,

After reset also the SPI port does not communicate. It seems that the SPI port gets damaged permanantly. Whether any care from hardware/software point of view for SPI design is needed?

Regards,

SSK

Re: SPI port failure

bigmac — Thu, 13 Dec 2007 03:21:18 GMT

Hello,

Yes, it is possible to potentially cause damage the MCU devices in a number of ways. The following possibilities come to mind -

Incorrect connections between the two MCUs.
The two MCUs have different Vdd supply voltages.
The two MCUs operate using different power sources, and one of the sources is turned off.
Both MCUs are simultaneously configured for SPI master operation.
The interconnections between the two MCUs have been subjected to severe static discharge, or other over-voltage.

Items 1, 2, 3 and 4 can result in over-current stress. When experimenting, it is probably a good idea to fit series resistors (say 1k) in each of the interconnections, so as to limit any excess current. SPI communications is not intended to cater for wide physical separation between master and slave(s). They should be in very close proximity, preferably on the same circuit board. This is likely to minimize the possibility of static discharge problems.

Have you been able to ascertain whether both MCUs are damaged? When you send a byte from the master SPI (with slave disconnected), can you observe the presence of either the clock output signal, or the MOSI data signal? You will need to monitor these using an oscilloscope, preferably with single sweep capture. The monitoring process will be much easier if you significantly slow the SPI clock rate of the master.

Finally, did you successfully achieve SPI communications prior to the damage occurring?

Regards,

Mac

Message Edited by bigmac on 2007-12-13 06:26 AM

Re: SPI port failure

SSK — Thu, 13 Dec 2007 13:24:15 GMT

Hello Mac

Thank you very much for your nice reply.

Yes, it is possible to potentially cause damage the MCU devices in a number of ways. The following possibilities come to mind -

Incorrect connections between the two MCUs.
The two MCUs have different Vdd supply voltages.
The two MCUs operate using different power sources, and one of the sources is turned off.
Both MCUs are simultaneously configured for SPI master operation.
The interconnections between the two MCUs have been subjected to severe static discharge, or other over-voltage.

This could be the possible area where I need to concentrate. I am having multiple I/O cards - Analog Input, Analog Output, DIO etc placed at various slots. AI card is placed at considerably larger distance from the master SPI. In this case whether 1K series resi. will help me to minimize the problems? What could be the other resolution?

This I need to check using CROs.

Finally, did you successfully achieve SPI communications prior to the damage occurring?

Yes !! Above configuration of IO cards work normally. Only in some cases, even after some successful working cycles, the failure occurs.

Regards,

SSK

Re: SPI port failure

bigmac — Fri, 14 Dec 2007 23:58:53 GMT

Hello SSK,

Are you also implying that the analog input, analog output and DIO cards also utilize SPI communications? I presume your "considerably larger distance" would amount to locating the card at the opposite end of a card cage. You may find that permanent series resistors for each output, whether at the master or a slave, may offer a measure of over-current protection, especially when "hot plugging" is possible (but perhaps not recommended). Depending on the amount of loading capacitance, a reduced SPI clock frequency might prove necessary.

If you wish to protect the MCU, at the expense of a more easily replaceable component, you might also consider non-inverting buffers for both input and output lines, at the master card. With this arrangement, protective resistors would still be desireable, to protect the buffer device.

Another measure would be the inclusion of a pair of Schottky diodes at each line, to offer some additional transient protection at the card connector (for both master and slave ends). However, the diodes will contribute to the total load capacitance.

Regards,

Mac

Re: SPI port failure

SSK — Tue, 18 Dec 2007 13:29:40 GMT

Hi Mac,

Thanks again for nice reply.

I will certainly work on these suggestions. Is anybody facing similar kind of experience with SPI port? what are their observations?

Thanks in advance.

Regards,

SSK