MPU in supervisor state on S12X

GuillaumeDourne — Thu, 14 Jan 2010 19:22:07 GMT

Hi,

I want to use the MPU in the supervisor state.

The MPU works in the user state (by detect the MPU access Error interrupt on violation access set for the test), but when I try in supervisor state the MPU access error interrupt does not append whereas the MPUSEL_SVSEN was set to 1 as defined in the datasheet.

I tried to configure the MPU with and without the MPUSEL_SVSEN set to 1, but there is no effect.

Why the MPU access error interrupt does not append in the supervisor state ?

Example of MPU configuration :

#define Start_Shared_Data1 __SEG_START_SHARED_DATA1
#define End_Shared_Data1 __SEG_END_SHARED_DATA1

#define CPU_S12           0x40
#define CPU_XGATE         0x20
#define WRITE_DISABLE     0x80
#define EXECUTE_DISABLE   0x40

/* Initialization of Memory Protection unit */
//setReg8(MPUSEL, 1 | MPUSEL_SVSEN_MASK); /* Select Descriptor num. 1 */
setReg8(MPUSEL, 1); /* Select Descriptor num. 1 */
U32Tmp_LowAdrress = (UINT32)Start_Shared_Data1;
U32Tmp_HighAdrress = (UINT32)End_Shared_Data1;
setReg8(MPUDESC2, ((UINT8)(U32Tmp_LowAdrress >> 3)));
setReg8(MPUDESC1, ((UINT8)(U32Tmp_LowAdrress >> 11)));
setReg8(MPUDESC0, (CPU_S12 | ((UINT8)(U32Tmp_LowAdrress >> 19))));
setReg8(MPUDESC5, ((UINT8)(U32Tmp_HighAdrress >> 3)));
setReg8(MPUDESC4, ((UINT8)(U32Tmp_HighAdrress >> 11)));
setReg8(MPUDESC3, (WRITE_DISABLE | EXECUTE_DISABLE | ((UINT8)(U32Tmp_HighAdrress >> 19))));

And after this configuration is set :

// Enable MPU in supervisor state
MPUSEL_SVSEN = 1;

If I change "Enable MPU in supervisor state" for "Set the CPU in User State" as follow, the MPUaccess error interrupt appends correctly as I want.

// Set the CPU in User State
asm("TFR CCRH,A");
asm("ORAA #128");
asm("TFR A,CCRH");

If you have an idea, you are welcome.

Thanks.

Guillaume.

Re: MPU in supervisor state on S12X

MJW — Thu, 14 Jan 2010 19:31:15 GMT

Hello Guillaume,

the descriptor in your example only covers the CPU in user state (bit 6 in MPUDESC0). To enable the descriptor for the CPU in supervisor state set bit 7 in MPUDESC0 as well.

MJW

Message Edited by MJW on 2010-01-14 12:32 PM

topic Re: MPU in supervisor state on S12X in S12 / MagniV Microcontrollers

MPU in supervisor state on S12X

Re: MPU in supervisor state on S12X