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    <title>S12 / MagniV MicrocontrollersのトピックSPI problem with MC9S12C32 on CSM12C32</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-problem-with-MC9S12C32-on-CSM12C32/m-p/163980#M5258</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi,&lt;/P&gt;&lt;P&gt;i have a csm12c32 dev. board. im trying to use SPIto communicate with an accelerometer sensor.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;according to the manual of mc9s12 series, SPIF flag of SPISR(status reg.) shouldnt be cleared until SPIDR is read. but it is going back to 0 while im trying to check if a transmition is complete. with debug, i can see SPIF becomes '1' after writing data to SPIDR. when i try to read this flag i get 0.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;i compiled same code for full chip simulation and it works as it is suppsed to be.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;any ideas about what i am doing wrong?&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 28 Dec 2009 07:14:21 GMT</pubDate>
    <dc:creator>Ersancan</dc:creator>
    <dc:date>2009-12-28T07:14:21Z</dc:date>
    <item>
      <title>SPI problem with MC9S12C32 on CSM12C32</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-problem-with-MC9S12C32-on-CSM12C32/m-p/163980#M5258</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi,&lt;/P&gt;&lt;P&gt;i have a csm12c32 dev. board. im trying to use SPIto communicate with an accelerometer sensor.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;according to the manual of mc9s12 series, SPIF flag of SPISR(status reg.) shouldnt be cleared until SPIDR is read. but it is going back to 0 while im trying to check if a transmition is complete. with debug, i can see SPIF becomes '1' after writing data to SPIDR. when i try to read this flag i get 0.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;i compiled same code for full chip simulation and it works as it is suppsed to be.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;any ideas about what i am doing wrong?&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Dec 2009 07:14:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-problem-with-MC9S12C32-on-CSM12C32/m-p/163980#M5258</guid>
      <dc:creator>Ersancan</dc:creator>
      <dc:date>2009-12-28T07:14:21Z</dc:date>
    </item>
    <item>
      <title>Re: SPI problem with MC9S12C32 on CSM12C32</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-problem-with-MC9S12C32-on-CSM12C32/m-p/163981#M5259</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The read of the registers by the debugger will provide the flag clearing mechanism.&amp;nbsp; So it is possible that the wait loop for the completion of the transfer will never exit if the flag becomes spuriously cleared within the loop.&amp;nbsp; Do not directly monitor either the SPI status register or the SPI data register during debug.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Mac&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Dec 2009 14:22:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-problem-with-MC9S12C32-on-CSM12C32/m-p/163981#M5259</guid>
      <dc:creator>bigmac</dc:creator>
      <dc:date>2009-12-28T14:22:42Z</dc:date>
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