topic Re: S12X RAM Protection Scheme (S12XDP512) in S12 / MagniV Microcontrollers

S12X RAM Protection Scheme (S12XDP512)

shedmeister — Thu, 05 Jun 2008 01:06:23 GMT

I want to have one RAM page ($f8) as shared between CPU and XGATE. I want no RAM pages for XGATE access only. The datasheet says RAMXGU must be less than RAMSHL, so do I set
RAMXGU = $f7
RAMSHL = $f8
RAMSHU = $f8
even though $f7 is a non-existent RAM page?

Thanks

Re: S12X RAM Protection Scheme (S12XDP512)

kef — Thu, 05 Jun 2008 02:22:02 GMT

RAMXGU = $f7 is indeed existing XDP512 RAM. Probably you are mixing that with RPAGE. No, RAMXGU setting is just a middle byte from 3-byte 24-bits global address. XDP512 32k RAM starts at global 0x0F8000'G, ends at 0x0FFFFF. Everything from RAMXGU = $80 to RAMXGU = $FF is existing XDP512 RAM. 128x 256byte pages.

Re: S12X RAM Protection Scheme (S12XDP512)

shedmeister — Thu, 05 Jun 2008 03:03:52 GMT

You're right - I was confusing it with RPAGE. Thanks for clarifying.
So now I want to set RAMSHL = $80 and RAMSHU = $8f to share the 1st 4K RAM page.
Any my original question still remains - how can I set RAMXGU lower than RAMSHL as specified in 17.4.3.2 of the data sheet (since the MSb is fixed at '1')?

Re: S12X RAM Protection Scheme (S12XDP512)

kef — Thu, 05 Jun 2008 18:33:19 GMT

Looks like what you are trying to do is impossible. With RAMXGU RAMSHL set to their min value $80, CPU12X can't write F8000'G-F80FF'G. So you have two options, either not use protection at all, or reserve 256 bytes for XGATE only. I would put XGATE stack there.