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    <title>S12 / MagniV Microcontrollers中的主题 Re: Reg: HCS12 Memory Re-Map</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158809#M4894</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Some derivatives ignore some INITRM bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xxxxx---&amp;nbsp;&amp;nbsp;&amp;nbsp; C32 ignores 3 lower INITRM bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xxxx----&amp;nbsp;&amp;nbsp;&amp;nbsp; D64 ignores 4&amp;nbsp;lower bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xxx-----&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; D128 - ignores 5 lower bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xx------&amp;nbsp;&amp;nbsp;&amp;nbsp; parts with&amp;nbsp;16k would ignore&amp;nbsp;6 lower bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xx-----h&amp;nbsp;&amp;nbsp; parts with 12k RAM&amp;nbsp;ignore 5 :smileyminus: bits, and use RAMHAL (h) to align 12k block withing 16k window&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 28 May 2008 23:18:01 GMT</pubDate>
    <dc:creator>kef</dc:creator>
    <dc:date>2008-05-28T23:18:01Z</dc:date>
    <item>
      <title>Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158801#M4886</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;Dear Everyone,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I am working with MC9S12DJ 64 MCU&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;By default, when I create a new project using Codewarrior Ver5.7.0. the .prm file assigns 3Kbytes to RAM i.e from 0x0400 TO&amp;nbsp;0x0FFF.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I want to remap this to have 4Kbytes.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;And I came to know the default Start12.c code has his remap technique if we enable Serial Monitor according to the following code snippset.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="msg_source_code"&gt;&lt;DIV class="text_smallest"&gt;Code:&lt;/DIV&gt;&lt;PRE&gt;#if defined(_HCS12_SERIALMON)&amp;nbsp;&amp;nbsp; /* for Monitor based software remap the RAM &amp;amp; EEPROM to adhere&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; to EB386. Edit RAM and EEPROM sections in PRM file to match these. */&amp;nbsp;&amp;nbsp; ___INITRG = 0x00;&amp;nbsp; /* lock registers block to 0x0000 */&amp;nbsp;&amp;nbsp; ___INITRM = 0x39;&amp;nbsp; /* lock Ram to end at 0x3FFF */&amp;nbsp;&amp;nbsp; ___INITEE = 0x09;&amp;nbsp; /* lock EEPROM block to end at 0x0fff */#endif&lt;/PRE&gt;&lt;/DIV&gt;&lt;P&gt;But, i have the follwoing two questions on this,&lt;/P&gt;&lt;P&gt;1. Can anyone please tell me how to enable this Serial Monitor code to re-map the memory in the MCU.&lt;/P&gt;&lt;P&gt;2. And imagine if the Serial Monitor is enabled, and the initialization of registers (INITRG = 0x00, INITRM = 0x39, and INITEE = 0x09) has become effective, what will be the starting address for the RAM or what are the boundaries of RAM in the whole memory map.&lt;/P&gt;&lt;P&gt;&amp;nbsp;According to the above snippset, it says the ending address of the RAM is 0x3FFF, and the total RAM size of this MCU is 4Kbytes, so the starting address will be 0x3000. (i.e. form 0x3000 to 0x3FFF = 4Kbytes)&lt;/P&gt;&lt;P&gt;Here, I am confused, why the INITRM was assigned 0x39 and why not 0x31...?? and what is the starting address of RAM if INITRM = 0x39; (Why the RAM11 bit of INITRM register has been assigned as 1).&lt;/P&gt;&lt;P&gt;Actually, I am pretty much confused with RAM11 bit, I referred to AN2881.pdf, it says...for example&lt;/P&gt;&lt;P&gt;if INITRM = 0x20; then RAM Boundary will be 0x2000 ~ 0x2FFF&lt;/P&gt;&lt;P&gt;if INITRM = 0x30; then RAM Boundary will be 0x3000 ~ 0x3FFF&lt;/P&gt;&lt;P&gt;so what will be the starting ddress format if we use RAM11 bit ...???&lt;/P&gt;&lt;P&gt;As I am not very experieced in this filed, all the help from you will be greatly helpful to me...&lt;/P&gt;&lt;P&gt;Thanks to you all in advance&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Oct 2020 09:03:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158801#M4886</guid>
      <dc:creator>nandu</dc:creator>
      <dc:date>2020-10-29T09:03:53Z</dc:date>
    </item>
    <item>
      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158802#M4887</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;From what I know, the only way to get SerMon to remap memory would be to modify the source code, re-assemble it and re-flash&amp;nbsp; it.&lt;BR /&gt;&lt;BR /&gt;There are no provisions for re-mapping.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by JimDon on &lt;SPAN class="date_text"&gt;2008-05-26&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;10:48 AM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 May 2008 21:47:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158802#M4887</guid>
      <dc:creator>JimDon</dc:creator>
      <dc:date>2008-05-26T21:47:35Z</dc:date>
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    <item>
      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158803#M4888</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Thank you very much Mr.Jim&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;But I am confused, where should i modify my source code..??&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I am very much new to this MCU memory organization and re-mapping.,...can you please give me some detailed picture or idea about this..it will be greatly helpful to me..&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks and Regards&lt;/DIV&gt;&lt;DIV&gt;Nandu&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 May 2008 01:31:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158803#M4888</guid>
      <dc:creator>nandu</dc:creator>
      <dc:date>2008-05-28T01:31:27Z</dc:date>
    </item>
    <item>
      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158804#M4889</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;I don't use that chip, but CW should have set up the PRM file to work right with serial monitor.&lt;BR /&gt;CW puts that code in there for a sermon project bcause that is what sermon expects.&lt;BR /&gt;&lt;BR /&gt;If you change things too much then serman may crash, as it needs some of ram to function, and expects it to be where CE put it.&lt;BR /&gt;I also don't use sermon much (ok, at all, except for testing versions that I have built),.&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 May 2008 02:07:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158804#M4889</guid>
      <dc:creator>JimDon</dc:creator>
      <dc:date>2008-05-28T02:07:03Z</dc:date>
    </item>
    <item>
      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158805#M4890</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Yadunandan,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;What you want&amp;nbsp;can be achieved two ways.&amp;nbsp;You can create new project with PE enabled. PE by default remaps D64 RAM&amp;nbsp;to 0x3000-0x3FFF.&lt;/DIV&gt;&lt;DIV&gt;Also you can do this without PE. You need to do two things, 1) modify start12.c or define _HCS12_SERIALMON making _Startup() initializing INITRM register, and 2) modify RAM setting in *.prm file:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;/* RAM */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RAM&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = READ_WRITE&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;STRONG&gt;0x0400&lt;/STRONG&gt; TO&amp;nbsp;&amp;nbsp; &lt;STRONG&gt;0x0FFF&lt;/STRONG&gt;;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Regarding INITRM=0x39.&amp;nbsp;RAM11 is relevant only for parts with 2k of RAM, RAM12 - for 4k RAM, RAM13 - 8k etc. 2k RAM block can be mapped to any 2k boundary like $0, $800,$1000, etc. 4k RAM block can be mapped to any 4k boundary: $0, $1000, $2000 etc. 8k - $0, $2000, $4000. 12k RAM block - $0, $4000, $8000 etc. Since 12k block doesn't fill all 16k location, RAMHAL decides does it start at bottom or ends at top of 16k block. And INITRM=0x39 is unique in that it will make almost all S12 parts (new S12P is different animal) mapping their RAM so that RAM ends at 0x3FFF. This is useful in that&amp;nbsp;If one day there are no D64 in stock, you could buy D128 or bigger and chances are your code will work without single change.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by kef on &lt;SPAN class="date_text"&gt;2008-05-27&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;11:01 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 May 2008 02:57:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158805#M4890</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2008-05-28T02:57:52Z</dc:date>
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    <item>
      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158806#M4891</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;HI Mr.Kef,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks very much for your reply. I think i will use P&amp;amp;E to enable the Serial Monitor for my project.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;And one more thing,,here&amp;nbsp; i face some pecurial problem, please have a look at it..&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;In my project, as the default Memory Re-map in the _Startup() is blocking by the _HCS12_SERIALMON,&lt;/DIV&gt;&lt;DIV&gt;I modified the default Reset Vector (i.e Vector at 0xFFFE) to my own ISR called _EntryPoint() in which I re-map the memory for RAM &amp;amp; EEPROM and then call the _Startup() function as below.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT color="#0000ff"&gt;interrupt void _EntryPoint(void)&lt;BR /&gt;{&amp;nbsp;&amp;nbsp;&lt;BR /&gt;*(uint8_t *)0x0011 = 0x00;&lt;BR /&gt;INITRM = 0x31;&amp;nbsp; /* RAM size : 4K&amp;nbsp;, range : 0x3000 ~ 0x3FFF */&lt;BR /&gt;INITEE = 0x09;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;MISC&amp;nbsp;&amp;nbsp; = 0x01;&lt;BR /&gt;__asm jmp _Startup;&lt;BR /&gt;}&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;and configured my .prm file to have RAM size from 0x3000 to 0x3FFF.&lt;/DIV&gt;&lt;DIV&gt;So, untill now there is no problem as I am using MC9S12D64. But recently i have changed my MCU from MC9S12D64 to MC9S12DG128. As you know, MC9S12DG128 has 8Kbyte of RAM which can be mappable to any 8Kbytes of total memory (I.e. from 0x0000 to 0xFFFF).&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;As MCU is changed and the RAM memory of new MCU is 8Kbyte, i have to change the INITRM value in my isr _EntryPoint() to 0x21 or 0x20 and i have to configure my .prm file to have RAM memory from 0x2000 to 0x3FFF.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;But here i did a mistake, i changed my .prm file to have RAM memory from 0x2000 to 0x3FFF in the SECTIONS. But i forget to change the value that is assinged to INITRM register in my ISR (_EntryPoint()). It is same as previous value, i.e. INITRM = 0x31.That means, MCU tires to assign the RAM memory from 0x3000 to 0x4FFF(&lt;FONT color="#333300"&gt;since RAMHAL bit dont have any effect for this MCU&lt;/FONT&gt;), which can not be acceptable for MC9S12DG128&amp;nbsp;as it&amp;nbsp;has 8Kbyte RAM memory.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;So, in this situation we generally expect the system should go to some malfunction or might expect to halt with illegal bp. But, there is no&amp;nbsp;such of situation here. My system is working very fine even though i wrote 0x31 to INITRM register for MC9S12DG128 which is very very strange to me..&lt;IMG alt=":mansad:" class="emoticon emoticon-mansad" id="mansad" src="http://freescale.i.lithium.com/i/smilies/16x16_man-sad.gif" title="Man Sad" /&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;how is it possible..? How my system is not getting halted ..?? What might be the possible reasons..?? &lt;IMG alt=":mansurprised:" class="emoticon emoticon-mansurprised" id="mansurprised" src="http://freescale.i.lithium.com/i/smilies/16x16_man-surprised.gif" title="Man Surprised" /&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I feel there is something that is restricting my RAM memory going beyong 0x3FFF, but i couldn't figure out what it is..&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 May 2008 12:29:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158806#M4891</guid>
      <dc:creator>nandu</dc:creator>
      <dc:date>2008-05-28T12:29:20Z</dc:date>
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      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158807#M4892</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;BLOCKQUOTE&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;HR /&gt;&lt;DIV&gt;&lt;FONT color="#0000ff"&gt;INITRM = 0x31;&amp;nbsp; /* RAM size : 4K&amp;nbsp;, range : 0x3000 ~ 0x3FFF */&lt;BR /&gt;&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT color="#0000ff"&gt;...&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT color="#0000ff"&gt;&lt;/FONT&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;and configured my .prm file to have RAM size from 0x3000 to 0x3FFF.&lt;/DIV&gt;&lt;DIV&gt;So, untill now there is no problem as I am using MC9S12D64. But recently i have changed my MCU from MC9S12D64 to MC9S12DG128. As you know, MC9S12DG128 has 8Kbyte of RAM which can be mappable &lt;EM&gt;to any 8Kbytes&lt;/EM&gt; of total memory (I.e. from 0x0000 to 0xFFFF).&lt;/DIV&gt;&lt;HR /&gt;&lt;/DIV&gt;&lt;/BLOCKQUOTE&gt;&lt;DIV&gt;Not to any 8K, but to any 8K boundary. That means 8K RAM block can be mapped to 0-1FFF, 2000-3FFF, 4000-5FFF, etc. It can't be mapped for example to 3000-4FFF.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&lt;/DIV&gt;&lt;BLOCKQUOTE&gt;&lt;DIV&gt;&lt;HR /&gt;&lt;DIV&gt;As MCU is changed and the RAM memory of new MCU is 8Kbyte, i have to change the INITRM value in my isr _EntryPoint() to 0x21 or 0x20 and i have to configure my .prm file to have RAM memory from 0x2000 to 0x3FFF.&lt;/DIV&gt;&lt;HR /&gt;&lt;/DIV&gt;&lt;/BLOCKQUOTE&gt;&lt;DIV&gt;Not really. If what you have in D64, 4k of RAM and 64k of flash is enough for you, but you want to be able to run the same compiled binary&amp;nbsp;in D128 and in D256, then you should use INITRM=0x39 and use *.prm&amp;nbsp;that is valid for&amp;nbsp;smallest part, your code can run in.&lt;/DIV&gt;&lt;DIV&gt;INITRM=0x39 remaps D64 RAM to 0x3000-0x3FFF, D128 RAM to 0x2000-0x3FFF, 12k RAM block to 0x1000-0x3FFF&amp;nbsp;etc. I mentioned that before.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&lt;BLOCKQUOTE&gt;&lt;DIV&gt;&lt;HR /&gt;&lt;DIV&gt;But here i did a mistake, i changed my .prm file to have RAM memory from 0x2000 to 0x3FFF in the SECTIONS. But i forget to change the value that is assinged to INITRM register in my ISR (_EntryPoint()). It is same as previous value, i.e. INITRM = 0x31.That means, MCU tires to assign the RAM memory from &lt;FONT color="#ff0000"&gt;0x3000 to 0x4FFF&lt;/FONT&gt;(&lt;FONT color="#333300"&gt;since RAMHAL bit dont have any effect for this MCU&lt;/FONT&gt;), which can not be acceptable for MC9S12DG128&amp;nbsp;as it&amp;nbsp;has 8Kbyte RAM memory.&lt;/DIV&gt;&lt;HR /&gt;&lt;/DIV&gt;&lt;/BLOCKQUOTE&gt;&lt;DIV&gt;Again, RAMHAL is irrelevant for 2, 4, 8 and 16k RAM blocks. INITRM=31 remaps 8k of D128 RAM to 0x2000-0x3FFF.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&lt;BLOCKQUOTE&gt;&lt;DIV&gt;&lt;HR /&gt;&lt;DIV&gt;So, in this situation we generally expect the system should go to some malfunction or might expect to halt with illegal bp. But, there is no&amp;nbsp;such of situation here. My system is working very fine even though i wrote 0x31 to INITRM register for MC9S12DG128 which is very very strange to me..&lt;IMG alt=":mansad:" class="emoticon emoticon-mansad" id="mansad" src="http://freescale.i.lithium.com/i/smilies/16x16_man-sad.gif" title="Man Sad" /&gt;&lt;/DIV&gt;&lt;HR /&gt;&lt;/DIV&gt;&lt;/BLOCKQUOTE&gt;&lt;DIV&gt;:smileyhappy:. You did set&amp;nbsp;in&amp;nbsp;prm, that your RAM is at 0x2000-0x3FFF. And INITRM=0x31 perfectly matches that. On D128 INITRM=0x20, 0x21, 0x22..0x3F do the same, remap D128 8K RAM block to 0x2000-0x3FFF.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Regards&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 May 2008 13:01:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158807#M4892</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2008-05-28T13:01:18Z</dc:date>
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      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158808#M4893</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I completly agree with you Mr.Kef,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;But, how the value&amp;nbsp;of &lt;FONT color="#3333CC"&gt;0x39 to INITRM&lt;/FONT&gt; re-maps the RAM memory&amp;nbsp;correctly according to the MCU like D64 RAM to 0x3000-0x3FFF, D128 RAM to 0x2000-0x3FFF, 12k RAM block to 0x1000-0x3FFF&amp;nbsp;etc&lt;/DIV&gt;&lt;DIV&gt;I have a little confusion here&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;In general, i am thinking,the following INITRM values will give the memory map as shown below for an 8KByte MCU&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;if i write,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;INITRM = 0x20&amp;nbsp;&amp;nbsp; /*then, RAM will be from 0x2000 to 0x3FFF*/&lt;/DIV&gt;&lt;DIV&gt;INITRM = 0x21&amp;nbsp;&amp;nbsp; /*then, RAM will be from 0x2000 to 0x3FFF*/&lt;/DIV&gt;&lt;DIV&gt;INITRM = 0x30&amp;nbsp;&amp;nbsp; /*then, RAM will be from &lt;FONT color="#ff0000"&gt;0x3000 to 0x4FFF&lt;/FONT&gt;*/&lt;/DIV&gt;&lt;DIV&gt;INITRM = 0x31&amp;nbsp;&amp;nbsp; /*then, RAM will be from &lt;FONT color="#ff0000"&gt;0x3000 to 0x4FFF&lt;/FONT&gt;*/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;and since RAM can not be mappable to &lt;FONT color="#ff0000"&gt;0x3000 to 0x4FFF&amp;nbsp;&lt;/FONT&gt;in case of DG128, does&amp;nbsp;the MCU&amp;nbsp;automatically sets the base address to 0x3FFF and maps the memory from 0x2000 to 0x3FFF even though we write 0x30 or 0x31 to INITRM..??&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Did u got my point Kef, I hope i am not disturbing you much...&lt;/DIV&gt;&lt;DIV&gt;Kindly solve my confusion over this please&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 May 2008 14:42:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158808#M4893</guid>
      <dc:creator>nandu</dc:creator>
      <dc:date>2008-05-28T14:42:34Z</dc:date>
    </item>
    <item>
      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158809#M4894</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Some derivatives ignore some INITRM bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xxxxx---&amp;nbsp;&amp;nbsp;&amp;nbsp; C32 ignores 3 lower INITRM bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xxxx----&amp;nbsp;&amp;nbsp;&amp;nbsp; D64 ignores 4&amp;nbsp;lower bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xxx-----&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; D128 - ignores 5 lower bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xx------&amp;nbsp;&amp;nbsp;&amp;nbsp; parts with&amp;nbsp;16k would ignore&amp;nbsp;6 lower bits&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;xx-----h&amp;nbsp;&amp;nbsp; parts with 12k RAM&amp;nbsp;ignore 5 :smileyminus: bits, and use RAMHAL (h) to align 12k block withing 16k window&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 May 2008 23:18:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158809#M4894</guid>
      <dc:creator>kef</dc:creator>
      <dc:date>2008-05-28T23:18:01Z</dc:date>
    </item>
    <item>
      <title>Re: Reg: HCS12 Memory Re-Map</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158810#M4895</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Yes Mr.Kef.,,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Exaclty,.. I got cleared with this issue completly &lt;IMG alt=":smileyhappy:" class="emoticon emoticon-smileyhappy" id="smileyhappy" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-happy.gif" title="Smiley Happy" /&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Some of the INITRM bits will be ignored according to the RAM memory size of the derivative....&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;With your previous post, I got cleared with this and&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The Memory Mapping Control Module (MMC) datasheet of MC9SDG128 also tells that which bits are relevant for INITRM register according to derivative... ( Table 3-3, Page No.17)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thank you very much agian..this is such a useful information for me.. &lt;IMG alt=":manhappy:" class="emoticon emoticon-manhappy" id="manhappy" src="http://freescale.i.lithium.com/i/smilies/16x16_man-happy.gif" title="Man Happy" /&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 May 2008 22:09:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Reg-HCS12-Memory-Re-Map/m-p/158810#M4895</guid>
      <dc:creator>nandu</dc:creator>
      <dc:date>2008-05-29T22:09:03Z</dc:date>
    </item>
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