S12 / MagniV MicrocontrollersのトピックRe: Link Error : L1907: Fixup overflow in _InterruptVectorTable https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Link-Error-L1907-Fixup-overflow-in-InterruptVectorTable/m-p/158506#M4867 <HTML><HEAD></HEAD><BODY><P>Hello&nbsp;Vijay,</P><P>&nbsp;</P><P>First, may I suggest including the name of the derivative you are targeting in your messages ? I suspect that your issue is that you are placing&nbsp;canTransmitISR&nbsp;in a banked segment (either explicitly or implicitly by using the banked memory model). For S12/S12X the interrupt vector table contains 16-bit entries. As your routine is placed in banked memory, its address is 24-bit wide, hence it will not fit in the table entry. You should place your function in non-banked memory:</P><P>&nbsp;</P><PRE>#pragma push#pragma CODE_SEG __NEAR_SEG my_near_segment/* code for canTransmitISR */#pragma pop</PRE><P>&nbsp;</P><P>&nbsp;</P><P>Also, make sure you properly place&nbsp;my_near_segment&nbsp;in the PRM file. Something like (just using my very limited memory, I don't have CW installed at this time):</P><P>&nbsp;</P><PRE>PLACEMENT my_near_segment INTO NON_BANKED;END</PRE><P>&nbsp;</P><P>&nbsp;</P><P>&nbsp;</P></BODY></HTML> Thu, 29 Oct 2020 09:03:23 GMT NavidadRedivivu 2020-10-29T09:03:23Z Link Error : L1907: Fixup overflow in _InterruptVectorTable https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Link-Error-L1907-Fixup-overflow-in-InterruptVectorTable/m-p/158505#M4866 <HTML><HEAD></HEAD><BODY><P>Hello All,</P><P>&nbsp;</P><P>Iam implementing a CAN Driver in CW5.1. Configured project in Processor Expert .WhenI try to assign canTransmitISR&nbsp; to&nbsp; vector number 0x58&nbsp; as shown below</P><P>&nbsp;</P><P>static const tIsrFunc _InterruptVectorTable[] @0xFF10U = { /* Interrupt vector table */<BR />/*lint -restore Enable MISRA rule (1.1) checking. */<BR />&nbsp; /* ISR name&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; No.&nbsp; Address Pri XGATE Name&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Description */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x08&nbsp; 0xFF10&nbsp;&nbsp; -&nbsp;&nbsp; -&nbsp;&nbsp;&nbsp; ivVsi&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x09&nbsp; 0xFF12&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivReserved119 unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x0A&nbsp; 0xFF14&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivReserved118 unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x0B&nbsp; 0xFF16&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivReserved117 unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x0C&nbsp; 0xFF18&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivReserved116 unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x0D&nbsp; 0xFF1A&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivReserved115 unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x0E&nbsp; 0xFF1C&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivReserved114 unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x55&nbsp; 0xFFAA&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVcan1rx&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x56&nbsp; 0xFFAC&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVcan1err&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x57&nbsp; 0xFFAE&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVcan1wkup&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;canTransmitISR,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x58&nbsp; 0xFFB0&nbsp;&nbsp; 0&nbsp;&nbsp; no&nbsp;&nbsp; ivVcan0tx&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x59&nbsp; 0xFFB2&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVcan0rx&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x5A&nbsp; 0xFFB4&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVcan0err&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x5B&nbsp; 0xFFB6&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVcan0wkup&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x5C&nbsp; 0xFFB8&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVflash&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x5D&nbsp; 0xFFBA&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVeeprom&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x68&nbsp; 0xFFD0&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVatd1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x69&nbsp; 0xFFD2&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVatd0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x6A&nbsp; 0xFFD4&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVsci1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x6B&nbsp; 0xFFD6&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVsci0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x6C&nbsp; 0xFFD8&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVspi0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x6D&nbsp; 0xFFDA&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimpaie&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x6E&nbsp; 0xFFDC&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimpaaovf&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x6F&nbsp; 0xFFDE&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimovf&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x70&nbsp; 0xFFE0&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimch7&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x71&nbsp; 0xFFE2&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimch6&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x72&nbsp; 0xFFE4&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimch5&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x73&nbsp; 0xFFE6&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimch4&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x74&nbsp; 0xFFE8&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimch3&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x75&nbsp; 0xFFEA&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimch2&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x76&nbsp; 0xFFEC&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimch1&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x77&nbsp; 0xFFEE&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVtimch0&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x78&nbsp; 0xFFF0&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVrti&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x79&nbsp; 0xFFF2&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVirq&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x7A&nbsp; 0xFFF4&nbsp;&nbsp; -&nbsp;&nbsp; -&nbsp;&nbsp;&nbsp; ivVxirq&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x7B&nbsp; 0xFFF6&nbsp;&nbsp; -&nbsp;&nbsp; -&nbsp;&nbsp;&nbsp; ivVswi&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />&nbsp; &amp;Cpu_Interrupt&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x7C&nbsp; 0xFFF8&nbsp;&nbsp; -&nbsp;&nbsp; -&nbsp;&nbsp;&nbsp; ivVtrap&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */<BR />};<BR /></P><P>&nbsp;</P><P>I get this Linker Error.</P><P>&nbsp;</P><P>Link Error : L1907: Fixup overflow in _InterruptVectorTable, to&nbsp; canTransmitISR&nbsp; type 1, at offset 0xA0</P><P>&nbsp;</P><P>Can anybody suggest a solution for this.</P><P>&nbsp;</P><P>Thanks</P><P>Vijay</P></BODY></HTML> Fri, 12 Aug 2011 19:35:37 GMT https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Link-Error-L1907-Fixup-overflow-in-InterruptVectorTable/m-p/158505#M4866 vijay_TEL 2011-08-12T19:35:37Z Re: Link Error : L1907: Fixup overflow in _InterruptVectorTable https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Link-Error-L1907-Fixup-overflow-in-InterruptVectorTable/m-p/158506#M4867 <HTML><HEAD></HEAD><BODY><P>Hello&nbsp;Vijay,</P><P>&nbsp;</P><P>First, may I suggest including the name of the derivative you are targeting in your messages ? I suspect that your issue is that you are placing&nbsp;canTransmitISR&nbsp;in a banked segment (either explicitly or implicitly by using the banked memory model). For S12/S12X the interrupt vector table contains 16-bit entries. As your routine is placed in banked memory, its address is 24-bit wide, hence it will not fit in the table entry. You should place your function in non-banked memory:</P><P>&nbsp;</P><PRE>#pragma push#pragma CODE_SEG __NEAR_SEG my_near_segment/* code for canTransmitISR */#pragma pop</PRE><P>&nbsp;</P><P>&nbsp;</P><P>Also, make sure you properly place&nbsp;my_near_segment&nbsp;in the PRM file. Something like (just using my very limited memory, I don't have CW installed at this time):</P><P>&nbsp;</P><PRE>PLACEMENT my_near_segment INTO NON_BANKED;END</PRE><P>&nbsp;</P><P>&nbsp;</P><P>&nbsp;</P></BODY></HTML> Thu, 29 Oct 2020 09:03:23 GMT https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Link-Error-L1907-Fixup-overflow-in-InterruptVectorTable/m-p/158506#M4867 NavidadRedivivu 2020-10-29T09:03:23Z Re: Link Error : L1907: Fixup overflow in _InterruptVectorTable https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Link-Error-L1907-Fixup-overflow-in-InterruptVectorTable/m-p/158507#M4868 <HTML><HEAD></HEAD><BODY><P>Hello Navidad,</P><P>Thank you for ur reply. I was out of office for a while so could'nt get back to u.</P><P>&nbsp;</P><P>I found a solution with which it is working fine.but the problem is; i need to edit in Vectors.c when i open the project next time. It says that Vectors.c is modified and it ask whether to reload it. when I say Ok for loading theres no need to edit but it does'nt go to the ISR. Here is my implementation.:</P><P>&nbsp;</P><P>#pragma CODE_SEG __NEAR_SEG NON_BANKED </P><P>/* code for canTransmitISR */</P><P>#pragma CODE_SEG DEFAULT&nbsp;</P><P>and include&nbsp; &amp;canTransmitISR,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; /* 0x58&nbsp; 0xFFB0&nbsp;&nbsp; 1&nbsp;&nbsp; no&nbsp;&nbsp; ivVcan0tx&nbsp;&nbsp;&nbsp;&nbsp; unused by PE */ in Vectors.c</P><P>&nbsp;</P><P>&nbsp;</P><P>2) i tried with ur solution but it shows error as:</P><P>&nbsp;</P><P>Error :L1009: Segment Name NON_BANKED unknown</P></BODY></HTML> Wed, 07 Sep 2011 14:08:37 GMT https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Link-Error-L1907-Fixup-overflow-in-InterruptVectorTable/m-p/158507#M4868 vijay_TEL 2011-09-07T14:08:37Z