topic Re: PLL/Reset problem when single stepping with BDM in S12 / MagniV Microcontrollers

PLL/Reset problem when single stepping with BDM

NigelL — Thu, 09 Feb 2006 22:20:13 GMT

I am using the MC9S12E128 processor (80pin) and have a problem where the BDM sometimes looses control of the microcontroller and no further debugging is possible after executing the PLLSEL = 1 instruction (sets PLLSEL bit in the CLKSEL register). The program usually jumps to 0xFFFF. This happens every second or third time after programming the micro. Note that it makes no difference if I single-step to this instruction or run to this instruction.

If the PLLSEL = 1 instruction happens to be executed correctly then I can reset and run it correctly every time after that until reprogramming the chip again. Suggests a programming problem?

The PLL registers are set to SYNR = 0x0B and REFDV = 0x01, with a crystal frequency of 3.6864MHz. This gives a bus frequency of 22.1184MHz. Supply voltage is 3.1V.

The SYNR register is set first. Then the REFDV register. Once the PLL locks (checked via the LOCK bit in CRGFLG register), the PLL is selected.

Any suggestions are welcome!

Regards, Nigel

Re: PLL/Reset problem when single stepping with BDM

Alban — Fri, 10 Feb 2006 00:44:47 GMT

Hi Nigel,

The BDM clock is based on the target bus clock.

When you execute PLLSEL = 1, you change the bus clock.

Therefore you change the BDM communication speed.

Depending on your BDM debugging tool, you can have an option to get automatic speed and synchronization if the bus changes.

If the debugging tool doesn't change its clock, it cannot talk with the MCU anymore.

Cheers,

Alban.

Message Edited by Alban on 02-09-2006 04:50 PM

Re: PLL/Reset problem when single stepping with BDM

SebaS — Wed, 07 Nov 2007 20:32:56 GMT

Hi, I've got the same problem... One year later, jeje... I'm using Codewarriror v4.6, the target is the MC9S12A128. I'm using the USB BDM, and the debugging tool is HiWave. I want to debug in a speed up to 40Mhz... I've got the same problem at 24Mhz... That's because, as you said, the bus clock changes when PLLSEL=1... And you said that "Depending on your BDM debugging tool, you can have an option to get automatic speed and synchronization if the bus changes."
How can I do that??

Now, I'm running at self-clock speed 16Mhz... But if I can get higher speed that would be great... I'd like to push the uC to its maximun speed... Will the debugger tool / BDM have any problem with that?

THANKS!!

Re: PLL/Reset problem when single stepping with BDM

Nabla69 — Sat, 17 Nov 2007 02:13:32 GMT

Salut,

What debug cable are you using ?

Look at your board design as well... A high speed debugging won't work with a 4 metre cable
Put a 4.7KOhm or round about that value between Vdd and BGND pin on the connector.
If you try with a canned oscillator at 25MHz and the debugger works fine, you are likely to work fine even with the PLL.

Alban.