<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S12 / MagniV MicrocontrollersのトピックRe: Interrupt From Interrupt</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125916#M443</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;For timers TIM0 and TIM1; is setting these 2 flags enough to allow for other interrupts to occur?&lt;BR /&gt;&lt;BR /&gt;TIM0_TFLG2=128;&lt;BR /&gt;TIM1_TFLG2=128;&lt;BR /&gt;&lt;BR /&gt;For a RTI; is setting this flag enough to allow for other interrupts to occur?&lt;BR /&gt;CRGFLG = 128;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 13 Mar 2007 02:20:06 GMT</pubDate>
    <dc:creator>admin</dc:creator>
    <dc:date>2007-03-13T02:20:06Z</dc:date>
    <item>
      <title>9S12E - Interrupt From Interrupt</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125914#M441</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Can an interrupt be called while you are within and ISR in a 9S12E?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;ie:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;TIM0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;TIM1&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Alban Edit: FSL Part Number in Subject line.&lt;/SPAN&gt;&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2007-03-14&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;11:32 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Mar 2007 22:41:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125914#M441</guid>
      <dc:creator>admin</dc:creator>
      <dc:date>2007-03-12T22:41:09Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt From Interrupt</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125915#M442</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Yes, by you must re-enable interrupts.&lt;/DIV&gt;&lt;DIV&gt;By default the I bit is set when an interrupt is taken and this prevents further interrupts. You can clear the I-bit in the ISR and another interrupt can occur. The S12X family includes an interrupt priority capability that limits nested interrupt sources to those at a higher priority but this is not the case for the S12.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Mar 2007 00:07:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125915#M442</guid>
      <dc:creator>Steve</dc:creator>
      <dc:date>2007-03-13T00:07:46Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt From Interrupt</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125916#M443</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;For timers TIM0 and TIM1; is setting these 2 flags enough to allow for other interrupts to occur?&lt;BR /&gt;&lt;BR /&gt;TIM0_TFLG2=128;&lt;BR /&gt;TIM1_TFLG2=128;&lt;BR /&gt;&lt;BR /&gt;For a RTI; is setting this flag enough to allow for other interrupts to occur?&lt;BR /&gt;CRGFLG = 128;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Mar 2007 02:20:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125916#M443</guid>
      <dc:creator>admin</dc:creator>
      <dc:date>2007-03-13T02:20:06Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt From Interrupt</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125917#M444</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;What Steve said. As for which bit that does what, check the manual.&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Mar 2007 14:30:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125917#M444</guid>
      <dc:creator>Lundin</dc:creator>
      <dc:date>2007-03-13T14:30:07Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt From Interrupt</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125918#M445</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;This can be useful&lt;BR /&gt;&lt;BR /&gt;&lt;A href="http://www.freescale.com/files/microcontrollers/doc/app_note/AN2617.pdf" rel="nofollow" target="_blank"&gt;A Software Interrupt Priority Scheme for HCS12 Microcontrollers&lt;/A&gt; &lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;P&gt;Message Edited by PsychoDebugger on &lt;SPAN class="date_text"&gt;2007-04-18&lt;/SPAN&gt;&lt;SPAN class="time_text"&gt;10:16 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 18 Apr 2007 16:07:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12E-Interrupt-From-Interrupt/m-p/125918#M445</guid>
      <dc:creator>PsychoDebugger</dc:creator>
      <dc:date>2007-04-18T16:07:30Z</dc:date>
    </item>
  </channel>
</rss>

