<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Time delays necessary when writing to Flash memory? in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142932#M3481</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi all,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I'm using flash routines&amp;nbsp;downloaded from the Freescale website to erase / reprogram flash memory. My applications calls the flash erase command repeatedly in a loop incrementing the address pointer by 0x200 (the flash sector size) each time, so that the next secotr is erased until the entire region to be erased is erased. I get an error however when the erase flash routines are called.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;On examining (taking care not to interrupt the actual flash procedure with the BDM)&amp;nbsp;this with the debugger, I've noticed that there is always a breakdown on either the second or the third sector of flash that needs to be erased.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;One thought was that this may be because a certain time is required for a flash erase command to complete and maybe we need to put in a delay between successive calls to erase flash sectors. Could this be a problem?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Any other suggestions what could cause such behaviour?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Raghav&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 16 Jan 2007 02:31:59 GMT</pubDate>
    <dc:creator>raghav_sarma</dc:creator>
    <dc:date>2007-01-16T02:31:59Z</dc:date>
    <item>
      <title>Time delays necessary when writing to Flash memory?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142932#M3481</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi all,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I'm using flash routines&amp;nbsp;downloaded from the Freescale website to erase / reprogram flash memory. My applications calls the flash erase command repeatedly in a loop incrementing the address pointer by 0x200 (the flash sector size) each time, so that the next secotr is erased until the entire region to be erased is erased. I get an error however when the erase flash routines are called.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;On examining (taking care not to interrupt the actual flash procedure with the BDM)&amp;nbsp;this with the debugger, I've noticed that there is always a breakdown on either the second or the third sector of flash that needs to be erased.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;One thought was that this may be because a certain time is required for a flash erase command to complete and maybe we need to put in a delay between successive calls to erase flash sectors. Could this be a problem?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Any other suggestions what could cause such behaviour?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Raghav&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jan 2007 02:31:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142932#M3481</guid>
      <dc:creator>raghav_sarma</dc:creator>
      <dc:date>2007-01-16T02:31:59Z</dc:date>
    </item>
    <item>
      <title>Re: Time delays necessary when writing to Flash memory?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142933#M3482</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;What do you mean "a certain time required"? Don't you look at the CCIF flag before/after each command?&lt;BR /&gt;&lt;BR /&gt;Edit: Assuming HCS12, you didn't tell.&lt;P&gt;Message Edited by Lundin on &lt;SPAN class="date_text"&gt;2007-01-16&lt;/SPAN&gt;&lt;SPAN class="time_text"&gt;08:17 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jan 2007 15:17:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142933#M3482</guid>
      <dc:creator>Lundin</dc:creator>
      <dc:date>2007-01-16T15:17:15Z</dc:date>
    </item>
    <item>
      <title>Re: Time delays necessary when writing to Flash memory?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142934#M3483</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Yes I am using the HCS12 (DG128B) . I've just taken a look at the assembly code and Yes, this seems to look at the CCIF flag to see if the command has been completed. Aslo it seems to have a couple of time delays already. A snippet of the assembly code that erases flash is below. I guess then that&amp;nbsp;something else &amp;nbsp;must be causing my problems.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Raghav&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;;*********************************************************************&lt;BR /&gt;;* SpSub - register flash command and wait for Flash CCIF&lt;BR /&gt;;*&amp;nbsp; this subroutine is copied onto the stack before executing&lt;BR /&gt;;*&amp;nbsp; because you can't execute out of flash while a flash command is&lt;BR /&gt;;*&amp;nbsp; in progress (see DoOnStack to see how this is used)&lt;BR /&gt;;*&lt;BR /&gt;;* Note: must be even # of bytes!&lt;BR /&gt;;*&lt;BR /&gt;;* Uses 24 bytes on stack + 3 bytes for CALL above&lt;BR /&gt;;*********************************************************************&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;EVEN&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Make code start word aliened&lt;BR /&gt;SpSub:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;ldab&amp;nbsp;&amp;nbsp; SpSubEnd-SpSub+3,sp&amp;nbsp; ;get PPAGE back from stack&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;stab&amp;nbsp;&amp;nbsp; PPAGE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Store the PPAGE address&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;tfr&amp;nbsp;&amp;nbsp;&amp;nbsp; ccr,b&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;get copy of ccr&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;orcc&amp;nbsp; #$10&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;disable interrupts&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;staa&amp;nbsp;&amp;nbsp; FSTAT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;[PwO] register command&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;nop&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;[O] wait min 4~ from w cycle to r&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;nop&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;[O]&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;nop&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;[O]&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;brclr&amp;nbsp; FSTAT,mFSTAT_CCIF,*&amp;nbsp; ;[rfPPP] wait for queued commands to finish&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;tfr&amp;nbsp;&amp;nbsp;&amp;nbsp; b,ccr&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;restore ccr and int condition&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;rtc&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;back into DoOnStack in flash&lt;BR /&gt;SpSubEnd:&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jan 2007 16:42:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142934#M3483</guid>
      <dc:creator>raghav_sarma</dc:creator>
      <dc:date>2007-01-16T16:42:02Z</dc:date>
    </item>
    <item>
      <title>Re: Time delays necessary when writing to Flash memory?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142935#M3484</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Not sure what could be causing the problem. Do you run the code from RAM or from another flash bank than the one you are programming? If you don't know what I mean, then check this recent post, also for Dx128:&lt;BR /&gt;&lt;BR /&gt;&lt;A href="http://forums.freescale.com/freescale/board/message?board.id=16BITCOMM&amp;amp;" target="_blank"&gt;http://forums.freescale.com/freescale/board/message?board.id=16BITCOMM&amp;amp;&lt;/A&gt;;message.id=3018&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jan 2007 18:14:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142935#M3484</guid>
      <dc:creator>Lundin</dc:creator>
      <dc:date>2007-01-16T18:14:28Z</dc:date>
    </item>
    <item>
      <title>Re: Time delays necessary when writing to Flash memory?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142936#M3485</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi Lundin,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The &amp;nbsp;flash ruotines are put on to&amp;nbsp;he stack and run from there. I'm using the AN2720 flash memory programming utility from freescale.&lt;/DIV&gt;&lt;DIV&gt;&lt;A href="http://www.freescale.com/files/microcontrollers/doc/app_note/AN2720.pdf" rel="nofollow" target="_blank"&gt;http://www.freescale.com/files/microcontrollers/doc/app_note/AN2720.pdf&lt;/A&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The strange part is when I try calling the flash erase routines from main(), just to try and see if they are working fine, there is no problem. When my (CCP) application though calls them with exactly the same arguments, there are always the problems I've described above.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Raghav&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jan 2007 18:25:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142936#M3485</guid>
      <dc:creator>raghav_sarma</dc:creator>
      <dc:date>2007-01-16T18:25:16Z</dc:date>
    </item>
    <item>
      <title>Re: Time delays necessary when writing to Flash memory?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142937#M3486</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Lundin,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;It appears that the message that you pointed me to has been deleted. I was not able to look at this post.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Raghav&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jan 2007 18:27:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142937#M3486</guid>
      <dc:creator>raghav_sarma</dc:creator>
      <dc:date>2007-01-16T18:27:20Z</dc:date>
    </item>
    <item>
      <title>Re: Time delays necessary when writing to Flash memory?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142938#M3487</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Not sure how that ';' ended up in the URL. Here it is again:&lt;BR /&gt;&lt;BR /&gt;&lt;A href="http://forums.freescale.com/freescale/board/message?board.id=16BITCOMM&amp;amp;message.id=3018" target="_blank"&gt;http://forums.freescale.com/freescale/board/message?board.id=16BITCOMM&amp;amp;message.id=3018&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;Anyway, if you run the code from RAM, that shouldn't be a problem. Could be anything really, something with the clock prescaler calculation perhaps?&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Edit: The GUI of these messageboards is really annoying... Remove the ';' that pops up in the link and it should be fine. &lt;P&gt;Message Edited by Lundin on &lt;SPAN class="date_text"&gt;2007-01-16&lt;/SPAN&gt;&lt;SPAN class="time_text"&gt;11:58 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2007-01-16&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;11:41 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jan 2007 18:56:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142938#M3487</guid>
      <dc:creator>Lundin</dc:creator>
      <dc:date>2007-01-16T18:56:21Z</dc:date>
    </item>
    <item>
      <title>Re: Time delays necessary when writing to Flash memory?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142939#M3488</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi Lundin,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I don't see how you got the ";". I just pressed "delete" and submit and it disappeared.&lt;/DIV&gt;&lt;DIV&gt;Strange,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Alban.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Jan 2007 19:42:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Time-delays-necessary-when-writing-to-Flash-memory/m-p/142939#M3488</guid>
      <dc:creator>Alban</dc:creator>
      <dc:date>2007-01-16T19:42:38Z</dc:date>
    </item>
  </channel>
</rss>

