topic Re: [S12NE64] How to create array in external RAM in S12 / MagniV Microcontrollers

EVB9S12NE64 EXTERNAL RAM

Win — Mon, 30 Jan 2006 19:03:41 GMT

Hi,

Does anybody tried to work with the external ram

on the evb9s12ne64?

if so do you know how to config the linker file and have

any example of testing it?

Re: EVB9S12NE64 EXTERNAL RAM

Alban — Mon, 30 Jan 2006 19:50:27 GMT

Hi Winner,

I would advise you the Application Note AN2287 linked to the other AN2408.
The latest one gives you examples on the External Bus Interface for S122 generally speaking.

Is that all right ?
Cheers,
Alban.

Message Edited by bongosai on 2007-07-23 11:41 PM

Re: EVB9S12NE64 EXTERNAL RAM

Win — Mon, 30 Jan 2006 20:30:23 GMT

Hi Frenchman from Scotland,

I'v seen this appliction notes but could not understand

how to set up the prm file, what is the address range for the ram?

thanks.

Re: EVB9S12NE64 EXTERNAL RAM

Alban — Tue, 31 Jan 2006 00:32:32 GMT

Would something like the following be more suitable ?

/* paged RAM */

RAM_FB = READ_WRITE 0xFB1000 TO 0xFB1FFF;

RAM_FC = READ_WRITE 0xFC1000 TO 0xFC1FFF;

RAM_FD = READ_WRITE 0xFD1000 TO 0xFD1FFF;

/* RAM_FE = READ_WRITE 0xFE1000 TO 0xFE1FFF; intentionally not defined: equivalent to RAM */

/* RAM_FF = READ_WRITE 0xFF1000 TO 0xFF1FFF; intentionally not defined: equivalent to RAM */

Cheers,

Alban.

[S12NE64] How to create array in external RAM

Nabla69 — Fri, 10 Feb 2006 18:18:06 GMT

Hi Guys,

I wanted to share a very interesting and descriptive reply I receveid from FSL Support. I added my comments in between.

This answer explains how to create array in external RAM. If you want to do it on specific address inside internal RAM please contact me again.

MC9S12.. MCUs have paged and non-paged memory space

NE64
Address Addressed memory space
- 0000~4000 Internal
- 4000~7FFF Internal
- 8000~BFFF paged memory window – pages 3C,3D,3E,3F are assigned to internal flash memory so if the internal flash is enabled then addresses (3C0000,3D0000,3E0000,3F000) + (8000~BFFF) address internal flash.

Moreover, addresses 3E8000~3EBFFF address the same space as addresses 4000~7FFF and addresses 3F8000~3FBFFF address the same space as addresses C000~FFFF.

Note: If ROMHM bit in the register MISC is 1 then memory 4000~7FFF is disabled for direct access and it is accessible only by address 3E0000 + (8000~BFFF). Now, because addresses 4000~7FFF can not address internal space these addresses will appear on the external bus in expanded modes.

Unused pages 00~3B do not address internal space and together with memory window 8000~BFFF creates logical address for external bus.
- C000~FFFF Internal
-------------
Let’s say that logical paged address is internal MCU address created as (PPAGE<<16)+(8000~BFFF) and physical address is logical address transformed by internal HW and visible on the external bus. The transformation mechanism can be seen in the attached excel sheet ADDRESS ON BUS.xls.

So, if you need to create 8kB array (char or int) it is not any problem because it fits into one memory page which has 16kB size. Let’s consider memory connection as in the schematic for evaluation board 9S12NE64. Then we will use page 00 => logical address space 0x008000~0x00BFFF => physical address 0x000000~0x003FFF. We have to create section and placement for variable inside the PRM file and then we initiate variable inside defined placement.

Ladislav has prepared an example project NE64 - 8kB EX_SRAM which shows you how to ….

NOTE:
Compiler command line have to contain: -CpPPAGE=RUNTIME -D_HCS12 -Mb
The S12 has only one Page register and we want to access both Paged RAM and äged Flash so we need a small routine for the compiler to automatically deal with this... Neat !

Thank You very much Ladislav

Cheers,
Alvin.

Re: [S12NE64] How to create array in external RAM

arde — Sun, 10 May 2009 20:52:55 GMT

hi Alban Rampon,i want to read from extern RAM,and

i set up my extern RAM address is 0x4000-0x5fff(hardware set up).

what i must to write in

PRM file is MY_RAM = READ_WRITE 0x4000 TO 0x5fff,and DATA_PAGE INTO MY_RAM;

main.c：

#include <hidef.h> /* common defines and macros */
#include <MC9S12NE64.h> /* derivative information */

#pragma DATA_SEG __PPAGE_SEG DATA_PAGE

unsigned char MR1@0X4010;

#pragma DATA_SEG DEFAULT

void main(void) {
unsigned char *__far ptr;

CLKSEL=0;
CLKSEL_PLLSEL = 0; /* Select clock source from XTAL */
PLLCTL_PLLON = 0; /* Disable the PLL */
SYNR = 11; /* Set the multiplier register 2 2 */
REFDV = 7; /* Set the divider register 7 8 */
PLLCTL = 192;

PLLCTL_PLLON = 1; /* Enable the PLL */
while(!CRGFLG_LOCK); /* Wait */
CLKSEL_PLLSEL = 1; /* Select clock source from PLL */
///expended ram init///////////////////////////////////////
RDRIV=0x00;
PEAR=0X0C;
EBICTL=0X01;//0:free run
MISC=0X01;
MODE=0XAB;//normal expended wide

ptr=(unsigned char *__far)&MR1;
*ptr=0x80;

}

have something wrong ? thanks a lot

Message Edited by arde on 2009-05-10 02:54 PM