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    <title>topic Re: S12 - XGATE shared memory in paged areas in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/S12-XGATE-shared-memory-in-paged-areas/m-p/137738#M2659</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;I'm not completely clear on the problem here but it sounds like you can't access some of the paged RAM area from one of the cores.&lt;/DIV&gt;&lt;DIV&gt;Firstly, this can definitely be done so it appears to be a software setup issue.&lt;/DIV&gt;&lt;DIV&gt;I'm not clear if it's the XGATE or the CPU that can't access the memory but each requires its own address to do this. In your case it appears that the CPU is using a 24-bit (far) access while the XGATE will be a 16-bit address &amp;amp; this may have something to do with the problem.&lt;/DIV&gt;&lt;DIV&gt;I suspect the best place to get an answer may be from the good folks at Cosmic themselves.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 22 Jun 2007 15:23:42 GMT</pubDate>
    <dc:creator>Steve</dc:creator>
    <dc:date>2007-06-22T15:23:42Z</dc:date>
    <item>
      <title>S12 - XGATE shared memory in paged areas</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/S12-XGATE-shared-memory-in-paged-areas/m-p/137737#M2658</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;Hello!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I just started to program code for the XGATE on a S12XDP512 comnpiling with Cosmic. Everything works fine. -&amp;gt; Directing IRQ from S12 to XGATE, calling thread with a shared structure and giving Thread back to S12 by _sif().&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Well, my problem is, that I don't want to use 'unpaged' RAM-pages for the structure shared on S12 and XGATE. I tryed to link the code to a paged RAM area with the result, that I can't access the variable structure on the S12 (declared with @far) but on XGATE.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for your reply.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Jun 2007 02:33:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/S12-XGATE-shared-memory-in-paged-areas/m-p/137737#M2658</guid>
      <dc:creator>windows97</dc:creator>
      <dc:date>2007-06-22T02:33:16Z</dc:date>
    </item>
    <item>
      <title>Re: S12 - XGATE shared memory in paged areas</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/S12-XGATE-shared-memory-in-paged-areas/m-p/137738#M2659</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;I'm not completely clear on the problem here but it sounds like you can't access some of the paged RAM area from one of the cores.&lt;/DIV&gt;&lt;DIV&gt;Firstly, this can definitely be done so it appears to be a software setup issue.&lt;/DIV&gt;&lt;DIV&gt;I'm not clear if it's the XGATE or the CPU that can't access the memory but each requires its own address to do this. In your case it appears that the CPU is using a 24-bit (far) access while the XGATE will be a 16-bit address &amp;amp; this may have something to do with the problem.&lt;/DIV&gt;&lt;DIV&gt;I suspect the best place to get an answer may be from the good folks at Cosmic themselves.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Jun 2007 15:23:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/S12-XGATE-shared-memory-in-paged-areas/m-p/137738#M2659</guid>
      <dc:creator>Steve</dc:creator>
      <dc:date>2007-06-22T15:23:42Z</dc:date>
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