SCI TDRE & TC interrupt problem 9S12DP256B

LBdgWgt — Mon, 22 May 2006 21:18:08 GMT

Hello,

I have problem with TX and TDRE interrupt of SCI module. I used SCI module before without any problem but now..

I use 9s12DP256 (T-board from elektronikladen.de), ICC12 compiler and NoICE debugger. I activate the interrupt and i checked with the debugger that even at reset, both TDRE and TC bit in SCI0SR1 are set to 1. and after activating the interrupt, program directly went to ISR but then eventhough I read the SCI0SR1 with the corresponding bit set, the flag never cleared (set to 0). I am porting uC/OS-II to the uC and want to test it with the SCI module. I made program with receive interrupt with no problem.

here is my code:

/*****************************************************************************************************
* testing TX SCI interrupt function
* author : Leo Hendrawan
*
******************************************************************************************************/

#include

#define TRUE 1
#define FALSE 0

unsigned char flag = TRUE;

#pragma interrupt_handler SCI0_ISR
void SCI0_ISR(void)
{
if(SCI0SR1 & 0x80) // TDRE empty
{
flag = TRUE;
}
}

#pragma interrupt_handler TimerTick
void TimerTick(void)
{
static unsigned char tick = 0;
TFLG1 |= 0x40; // clear interrupt flag
TC6 = TCNT + 1250; // Compare value for 10 msec - 8 MHz

if(++tick == 50)
{
PORTB ^= 0x80;
tick = 0;
}
}

void main(void)
{
char msg[] = {'F','H','W','G','T', 0x0d, 0x0a, 0x00};
unsigned char i = 0, len;

// PORTB init - connected to LEDs
DDRB = 0xFF; // PORTB as output
PORTB = 0xFF; // init: all LED OFF

// SCI0 initialization
SCI0BD = 52 & 0x1fff; // 13-bits baudrate divider - 9600bps
SCI0CR1 = 0;
SCI0CR2 = 0x8C; // TDRE empty interrupt, Transmit & Receive enable

// Timer 6 initialization
TIOS |= 0x40; // TC6 is output compare.
TIE |= 0x40; // TC6 triggers interrupt.
TC6 = TCNT + 1250; // Compare value for 10 msec - 8 MHz
TSCR2 |= 0x06; // Timer prescaler divide by 64.
TSCR1 |= 0xA0; // Enable Timer, timer freeze in BDM

len = strlen(msg);

asm("cli"); // enable interrupt

while(1)
{
SCI0DRL = msg[i];
flag = FALSE;
while(flag == FALSE);

if(++i == len) i = 0;
}

}

anybody knows what is my problem?
thanks...

Re: SCI TDRE & TC interrupt problem 9S12DP256B

CCandido — Tue, 23 May 2006 06:52:12 GMT

#define RDRF 0x20

#define TDRE 0x80

void SCI0_ISR(void)
{
while((SCI0SR1 & RDRF) == 0){} // wait

my_buffer [index ++] = SCI0DRL;

or,

flags.my_sinal = 1;

}

main

while( ! index ){}

or,

while( ! flags.mysinal){}

or,

while(index < my_value){}

edited by Carlos Candido

S12 / MagniV MicrocontrollersのトピックRe: SCI TDRE & TC interrupt problem 9S12DP256B

SCI TDRE & TC interrupt problem 9S12DP256B

Re: SCI TDRE & TC interrupt problem 9S12DP256B