topic XGATE semaphore question in S12 / MagniV Microcontrollers

XGATE semaphore question

roberthiebert — Thu, 30 Oct 2025 01:34:00 GMT

MC9S12XEP100, CW Special Edition, USBDM, XGATE in RAM, coding in relocatable assembler.

I have a project that was written in absolute assembler which uses a lot of interrupts. It runs just fine now, but I want to incorporate XGATE to handle most, if not all of the interrupts. Why? Probably just to see if I can. To that end, I have been able to convert the project to relocatable assembler, (which wasn't easy for me) but it seems to work.

Anyway, I spend a lot of time studying the reference manuals and AN2685, but I 'm still not quite clear on the basics of XGATE semaphores.

When I change an interrupt service routine to be serviced by XGATE instead of the CPU, I have read that semaphores need to be involved, but I m not clear under just what circumstances.

Do they need to be used just when a variable is modified within an ISR serviced by XGATE, and, modified by an ISR service by the CPU?

Or.

Also, when a variable is modified within an ISR serviced by XGATE, but it is only used by the CPU, but not modified?

Regards,

Robert

Re: XGATE semaphore question

lama — Thu, 30 Oct 2025 10:41:59 GMT

Hi,

Semaphores are needed only when both cores (S12X and XGATE) access the same shared resource, typically a variable in RAM. The are needed to avoid simultaneous R/W from both cores. For example, CPU writes some data in one or two steps and XGATE reads them at the same moment. Data consistency is not guaranteed.

Use semaphores when:

A variable is modified by both XGATE and S12X ISRs.

Example: A status flag or counter updated by both cores. Or writing to a port.

A variable is modified by one core and read by the other, and the read must be consistent.

Example: A buffer index updated by XGATE and read by S12X in a loop.

You do not need semaphores when:

A variable is only modified by XGATE, and only read by S12X, and consistency is not critical (e.g., occasional stale reads are acceptable).
A variable is only accessed by one core (either read or write).

Note, I found in my old code following. It is probably not important for some mask sets but better to implement to be sure it works everywhere.

.... *.cxgate module

interrupt void PIT0isr(void)

{

//--- Protected software region starts // AN2685.pdf

//-----------------------------------------

// use this

asm LOOP1:

asm SSEM #0 // try to lock semaphore 0

asm SSEM #0 // try to lock semaphore 0 // once more due to internal silicon bug

asm BCC LOOP1 // retry if locked

//-----------------------------------------

//or this

//asm SSEM #0 // try to lock semaphore 0

//asm SSEM #0 // try to lock semaphore 0 // once more due to internal silicon bug

//asm BCC PIT0isr_RTI // return without flag clearing to enable service of an interrupt with higher priority

//-----------------------------------------

....

.....

....

//-----------------------------------------
asm CSEM #0 // release semaphore
//-----------------------------------------

asm PIT0isr_RTI:

//-----------------------------------------
PITTF = 0x01; // clear interrupt flag of PIT0isr

}

Best regards,

Ladislav

Re: XGATE semaphore question

roberthiebert — Thu, 30 Oct 2025 15:44:21 GMT

Hi Ladislav,

Thanks for the clarification. That's how I thought it should work, but I wasn't sure.

Regards,

Robert