<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Pin assignment for IIC at S912ZVL in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Pin-assignment-for-IIC-at-S912ZVL/m-p/2145010#M20681</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="HwtZe"&gt;&lt;SPAN class="jCAhz ChMk0b"&gt;&lt;SPAN class="ryNqvb"&gt;To route PT0 and PT1 to the IIC module, just set the appropriate bits in MODRR0.&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;SPAN class="jCAhz"&gt;&lt;SPAN class="ryNqvb"&gt;For PT0 and PT1, this usually means MODRR0 =0x10;&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="HwtZe"&gt;&lt;SPAN class="jCAhz ChMk0b"&gt;&lt;SPAN class="ryNqvb"&gt;You don't need to do anything else, just make sure that no other higher priority peripherals are enabled on the pins (if any).&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="HwtZe"&gt;&lt;SPAN class="jCAhz ChMk0b"&gt;&lt;SPAN class="ryNqvb"&gt;MODRR0 is a write-once register in normal mode, so make sure that there are no double writes to this register, as it is not recognizable in debug mode (write anytime in debug mode).&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Ladislav&lt;/P&gt;</description>
    <pubDate>Fri, 01 Aug 2025 08:26:06 GMT</pubDate>
    <dc:creator>lama</dc:creator>
    <dc:date>2025-08-01T08:26:06Z</dc:date>
    <item>
      <title>Pin assignment for IIC at S912ZVL</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Pin-assignment-for-IIC-at-S912ZVL/m-p/2143523#M20675</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I would like to use PT0 and PT1 for IIC communication. To do this, I have changed the routing register MODRR0.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Are any further settings required to route PT0 and PT1 to the IIC module?&lt;/P&gt;</description>
      <pubDate>Wed, 30 Jul 2025 11:48:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Pin-assignment-for-IIC-at-S912ZVL/m-p/2143523#M20675</guid>
      <dc:creator>Boris_Bloxsberg</dc:creator>
      <dc:date>2025-07-30T11:48:30Z</dc:date>
    </item>
    <item>
      <title>Re: Pin assignment for IIC at S912ZVL</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Pin-assignment-for-IIC-at-S912ZVL/m-p/2145010#M20681</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="HwtZe"&gt;&lt;SPAN class="jCAhz ChMk0b"&gt;&lt;SPAN class="ryNqvb"&gt;To route PT0 and PT1 to the IIC module, just set the appropriate bits in MODRR0.&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;SPAN class="jCAhz"&gt;&lt;SPAN class="ryNqvb"&gt;For PT0 and PT1, this usually means MODRR0 =0x10;&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="HwtZe"&gt;&lt;SPAN class="jCAhz ChMk0b"&gt;&lt;SPAN class="ryNqvb"&gt;You don't need to do anything else, just make sure that no other higher priority peripherals are enabled on the pins (if any).&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="HwtZe"&gt;&lt;SPAN class="jCAhz ChMk0b"&gt;&lt;SPAN class="ryNqvb"&gt;MODRR0 is a write-once register in normal mode, so make sure that there are no double writes to this register, as it is not recognizable in debug mode (write anytime in debug mode).&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Ladislav&lt;/P&gt;</description>
      <pubDate>Fri, 01 Aug 2025 08:26:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Pin-assignment-for-IIC-at-S912ZVL/m-p/2145010#M20681</guid>
      <dc:creator>lama</dc:creator>
      <dc:date>2025-08-01T08:26:06Z</dc:date>
    </item>
  </channel>
</rss>

