topic Re: IRQ falling edge selection in S12 / MagniV Microcontrollers

IRQ timings

NetGhost — Thu, 26 Oct 2006 08:07:43 GMT

Hi for all of you...

This is the first time I login to this forum, so forgive me some uncorrections that I will certainly make...

I've been working for some time in a project with an MC9S12XDP512 processor. I've been abble to put all the things working on it. AD, SPI, timers, interrupts and so on.

But, and we always have a but, I'm having some troubles with IRQ... Specially with the duration of the pulse on the IRQ pin.

If I send a small pulse to it, sooner or later I'll get a spurious interrupt. If a send a too longer pulse, I'll get it once again.

Does anyone knows where to find some information on timings for this processor?

Best regards

Paulo

Re: IRQ timings

Alban — Thu, 26 Oct 2006 17:34:21 GMT

Hi Paulo,

You kind of answered your question yourself with the post Re: XIRQ Timing

Have a look Table 2-1 page 73 of datasheet MC9S12XDP512 Rev2.12.

This pin can be configured as Low Level or Falling-Edge sensitive.

If you configure as Falling-Edge, you don't care about having a double IRQ because your pulse is too long !

Ditto for XIRQ.

Alban.

Re: IRQ timings

NetGhost — Fri, 27 Oct 2006 16:21:14 GMT

Hi Alban...

Thanks for your post. I already realized what you tell me. Looking on doc AN2727 I found this:

" Port E.1 : IRQ

PE1 is a general purpose input pin and optional maskable interrupt request input that can provide a means of applying asynchronous interrupt requests. This will wake up the MCU from STOP or WAIT mode. By default this interrupt input is active low level sensitive but can be configured in software to falling edge sensitive. "

My only trouble is tha I can not find how to configure IRQ or XIRQ to use falling edge triggering instead of level triggering...

If you can help me on this, I'd appreciate

Best Regards

Paulo

Re: IRQ timings

NetGhost — Fri, 27 Oct 2006 16:30:23 GMT

By the way,

I only have rev. 2.15 of MC9S12XDP512 Datasheet manual. That's the one I can download from this site.

I Do not know if the table you are referencing is the same, but on page 73 on this manual I have table 1-12 and it's about interrupt vector address. Table 2-1 is about CRG memory map and is on page 83.

On both tables I was not able to find information on changing interrupt triggering type...

Best Regards

Paulo

Re: IRQ falling edge selection

Alban — Fri, 27 Oct 2006 17:31:26 GMT

Hi,

Look for the following and the picture enclosed.

IRQ Control Register (IRQCR)

Alban.

Re: IRQ falling edge selection

NetGhost — Fri, 27 Oct 2006 22:54:27 GMT

Thanks a lot this solved my problem...

Best Regards

Paulo