<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic 回复： timer overflow interrupt in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/timer-overflow-interrupt/m-p/1926181#M20090</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;There is not enough info in your description to say exactly what wrong you are doing. So, allow me to make considerations about your issue.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Just check….&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;The test for TOF is useless because interrupt means the TOF is set.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Tov = 65536 * (32/20,000,000) = 0.1048576 s … Timer period to overflow&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Expected number of overflows 0.172s / 0.1048576 s = 1.64&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Note: TFFCA&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Timer Fast Flag Clear All&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;0 Allows the timer flag clearing to function normally.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;1 For TFLG1(0x000E), a read from an input capture or a write to the output compare channel (0x0010–0x001F)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;causes the corresponding channel flag, CnF, to be cleared. For TFLG2 (0x000F), any access to the TCNT&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;register (0x0004, 0x0005) clears the TOF flag. Any access to the PACNT registers (0x0022, 0x0023) clears&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;the PAOVF and PAIF flags in the PAFLG register (0x0021). This has the advantage of eliminating software&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;overhead in a separate clear sequence. Extra care is required to avoid accidental flag clearing due to&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;unintended accesses.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Moreover, bear in mind Write to TCNT has no meaning or effect in the normal mode; only writable in special modes. If you want to reset the TCNT for another period then it is necessary to combine it with “reset TCNT on TC7 overflow”.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Let’s suppose we will not use TFFCA. If we use it then interrupt flags are cleared manually. Do not combine TFFCA with manual clearing of flags.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Here I write the simple code, not tested, you can compare with yours.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Moreover think about other interrupts whether they are not so often that TOV is not executed because of its priority. Moreover, I think you check the TOV in debug mode and you forget to freeze timer in this mode... look in the code setup of TSCR1.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;----------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#pragma CODE_SEG NON_BANKED&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;interrupt 16 void TIM_Ovf_Isr(void);&amp;nbsp;&amp;nbsp; // or interrupt ((0xFE-0xDE)/2) void TIM_TC7isr(void);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#pragma CODE_SEG DEFAULT&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;----------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;static unsigned long TIM_Ovf_Cnt=0;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;----------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#pragma CODE_SEG NON_BANKED&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;interrupt 16 void TIM_Ovf_Isr(void) &amp;nbsp;&amp;nbsp;&amp;nbsp;// or interrupt ((0xFE-0xDE)/2) void TIM_TC7isr(void);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; TFLG2 = 0x80;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; TIM_Ovf_Cnt++;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#pragma CODE_SEG DEFAULT&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;----------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;void main void&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//-------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; // BUSCLK is 20MHz&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; //You know that you have this clock… &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; //BUSCLK setup&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//-------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; //Timer clock = BUS_FREQ/(2^PREESCALER_VALUE) = 20MHz/32 = 625kHz; timer period = 1.6us&lt;/SPAN&gt;&lt;SPAN&gt;。&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; TSCR2 = 0B10000101; // enable TIM ovf, No TIM reset dependance of the TC7 channel, PRSC = 32[d]&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; TSCR1 = 0B11100000;// enab. tim, freeze tim in DBG mode and wait mode, no precision TIM, no fast flag clear&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//-------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; // Enable I-bit maskable interrupts&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; ASM CLI;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//-------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; // main loop&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; while(1)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; {&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; }&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Ladislav&lt;/P&gt;</description>
    <pubDate>Tue, 06 Aug 2024 08:56:15 GMT</pubDate>
    <dc:creator>lama</dc:creator>
    <dc:date>2024-08-06T08:56:15Z</dc:date>
    <item>
      <title>timer overflow interrupt</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/timer-overflow-interrupt/m-p/1923800#M20087</link>
      <description>&lt;P&gt;The MCU I'm using is MC9S12P128，I want to use the overflow interrupt to record the number of overflows of the tcnt, but after I add the overflow interrupt, the program keeps going into the overflow interrupt. What's the problem？my timer prescaler value is TSCR2_PR=5, Timer clock = BUS_FREQ/(2^PREESCALER_VALUE) = 20MHz/32 = 625kHz; timer period = 1.6us。 My capture pulse cycle is 172ms, which means it will overflow once. The actual overflow interrupt in and out frequency is 4.2us. The interruption procedure is as follows： void interrupt TimerOverflow_Isr(void) { if(TFLG2_TOF == 1){ TFLG2 = 0x80; //CLEAR TOF PORTB_PB6 ^= 1; //TEST u16timeroverflow_Count++; } } Interrupt vector： TimerOverflow_Isr, /* 0x6F 0xFFDE ivVtimovf&lt;/P&gt;</description>
      <pubDate>Fri, 02 Aug 2024 08:11:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/timer-overflow-interrupt/m-p/1923800#M20087</guid>
      <dc:creator>zixia</dc:creator>
      <dc:date>2024-08-02T08:11:46Z</dc:date>
    </item>
    <item>
      <title>回复： timer overflow interrupt</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/timer-overflow-interrupt/m-p/1923950#M20088</link>
      <description>&lt;P&gt;Captures whether an interrupt conflicts with an overflow interrupt？&lt;/P&gt;</description>
      <pubDate>Fri, 02 Aug 2024 11:04:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/timer-overflow-interrupt/m-p/1923950#M20088</guid>
      <dc:creator>zixia</dc:creator>
      <dc:date>2024-08-02T11:04:14Z</dc:date>
    </item>
    <item>
      <title>回复： timer overflow interrupt</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/timer-overflow-interrupt/m-p/1926181#M20090</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;There is not enough info in your description to say exactly what wrong you are doing. So, allow me to make considerations about your issue.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Just check….&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;The test for TOF is useless because interrupt means the TOF is set.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Tov = 65536 * (32/20,000,000) = 0.1048576 s … Timer period to overflow&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Expected number of overflows 0.172s / 0.1048576 s = 1.64&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Note: TFFCA&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Timer Fast Flag Clear All&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;0 Allows the timer flag clearing to function normally.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;1 For TFLG1(0x000E), a read from an input capture or a write to the output compare channel (0x0010–0x001F)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;causes the corresponding channel flag, CnF, to be cleared. For TFLG2 (0x000F), any access to the TCNT&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;register (0x0004, 0x0005) clears the TOF flag. Any access to the PACNT registers (0x0022, 0x0023) clears&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;the PAOVF and PAIF flags in the PAFLG register (0x0021). This has the advantage of eliminating software&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;overhead in a separate clear sequence. Extra care is required to avoid accidental flag clearing due to&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;unintended accesses.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Moreover, bear in mind Write to TCNT has no meaning or effect in the normal mode; only writable in special modes. If you want to reset the TCNT for another period then it is necessary to combine it with “reset TCNT on TC7 overflow”.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Let’s suppose we will not use TFFCA. If we use it then interrupt flags are cleared manually. Do not combine TFFCA with manual clearing of flags.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Here I write the simple code, not tested, you can compare with yours.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Moreover think about other interrupts whether they are not so often that TOV is not executed because of its priority. Moreover, I think you check the TOV in debug mode and you forget to freeze timer in this mode... look in the code setup of TSCR1.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;----------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#pragma CODE_SEG NON_BANKED&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;interrupt 16 void TIM_Ovf_Isr(void);&amp;nbsp;&amp;nbsp; // or interrupt ((0xFE-0xDE)/2) void TIM_TC7isr(void);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#pragma CODE_SEG DEFAULT&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;----------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;static unsigned long TIM_Ovf_Cnt=0;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;----------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#pragma CODE_SEG NON_BANKED&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;interrupt 16 void TIM_Ovf_Isr(void) &amp;nbsp;&amp;nbsp;&amp;nbsp;// or interrupt ((0xFE-0xDE)/2) void TIM_TC7isr(void);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; TFLG2 = 0x80;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; TIM_Ovf_Cnt++;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#pragma CODE_SEG DEFAULT&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;----------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;void main void&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//-------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; // BUSCLK is 20MHz&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; //You know that you have this clock… &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; //BUSCLK setup&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//-------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; //Timer clock = BUS_FREQ/(2^PREESCALER_VALUE) = 20MHz/32 = 625kHz; timer period = 1.6us&lt;/SPAN&gt;&lt;SPAN&gt;。&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; TSCR2 = 0B10000101; // enable TIM ovf, No TIM reset dependance of the TC7 channel, PRSC = 32[d]&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; TSCR1 = 0B11100000;// enab. tim, freeze tim in DBG mode and wait mode, no precision TIM, no fast flag clear&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//-------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; // Enable I-bit maskable interrupts&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; ASM CLI;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//-------------------------------------&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; // main loop&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; while(1)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; {&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; }&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;//.....................................&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Ladislav&lt;/P&gt;</description>
      <pubDate>Tue, 06 Aug 2024 08:56:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/timer-overflow-interrupt/m-p/1926181#M20090</guid>
      <dc:creator>lama</dc:creator>
      <dc:date>2024-08-06T08:56:15Z</dc:date>
    </item>
  </channel>
</rss>

