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    <title>topic Re: Lin Frame Format in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Lin-Frame-Format/m-p/1577699#M19018</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;itsnewforme,&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV&gt;&lt;SPAN&gt;&lt;STRONG&gt;&lt;EM&gt;[Q.1]:&amp;nbsp;&lt;/EM&gt;&lt;EM&gt;I'm able to see consecutive frame on DSO for Tx Frame &amp;amp; Rx Frame. PFA, Is it correct ?&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR aria-hidden="true" /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;=&amp;gt; I am not sure. Because the frames that were sent on the bus were decided by Master. The master sends the header of the frame(Break, Sync, PID). The slave sends a response(Data, Checksum) if it is publisher of the PID. So, please recheck the master node and your .ldf file to know what the frames are sent.&lt;BR aria-hidden="true" /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;  &lt;/SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxf78987_0-1672899476132.png" style="width: 429px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/206153i75FC70670B095731/image-dimensions/429x186?v=v2" width="429" height="186" role="button" title="nxf78987_0-1672899476132.png" alt="nxf78987_0-1672899476132.png" /&gt;&lt;/span&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxf78987_1-1672899476140.png" style="width: 450px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/206155i3171F6E53AF6878C/image-dimensions/450x134?v=v2" width="450" height="134" role="button" title="nxf78987_1-1672899476140.png" alt="nxf78987_1-1672899476140.png" /&gt;&lt;/span&gt;
&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;&lt;SPAN&gt;[Q. 2] There is continuous set of 1 bit&amp;nbsp; between Tx and Rx frame. What are those and from which part of stack is it coming?&lt;/SPAN&gt;&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;DIV&gt;
&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxf78987_2-1672899476144.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/206154i86AD96EB34049D94/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxf78987_2-1672899476144.png" alt="nxf78987_2-1672899476144.png" /&gt;&lt;/span&gt;
&lt;P&gt;&lt;SPAN&gt;=&amp;gt; It is a Lin signal between lin . frames. When do not have any frames on the bus, the LIN bus is always set to high by LIN transceiver.&lt;/SPAN&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Dan&lt;/P&gt;</description>
    <pubDate>Thu, 05 Jan 2023 06:20:44 GMT</pubDate>
    <dc:creator>DanNguyenDuy</dc:creator>
    <dc:date>2023-01-05T06:20:44Z</dc:date>
    <item>
      <title>Lin Frame Format</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Lin-Frame-Format/m-p/1574821#M19017</link>
      <description>&lt;P&gt;Hi, I'm using NXP Lin stack For S12ZVL64 as Slave. I have created LDF consisting of one bit Tx Signal and one bit Rx Signal.&lt;/P&gt;&lt;P&gt;In DSO, I'm able to Map the Lin Frame Format for both Tx and Rx Frame But, I've few questions&amp;nbsp;&lt;/P&gt;&lt;P&gt;Q.1] I'm able to see consecutive frame on DSO for Tx Frame &amp;amp; Rx Frame. PFA, Is it correct ?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="itsnewforme_0-1672122763682.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/205518iECCB1FBEDD6B59FA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="itsnewforme_0-1672122763682.png" alt="itsnewforme_0-1672122763682.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Q. 2] There is continuous set of 1 bit&amp;nbsp; between Tx and Rx frame. What are those and from which part of stack is it coming ?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="itsnewforme_1-1672122861458.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/205519i375D624D86A775EC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="itsnewforme_1-1672122861458.png" alt="itsnewforme_1-1672122861458.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Abhijit.&lt;/P&gt;</description>
      <pubDate>Tue, 27 Dec 2022 06:39:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Lin-Frame-Format/m-p/1574821#M19017</guid>
      <dc:creator>itsnewforme</dc:creator>
      <dc:date>2022-12-27T06:39:46Z</dc:date>
    </item>
    <item>
      <title>Re: Lin Frame Format</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Lin-Frame-Format/m-p/1577699#M19018</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;itsnewforme,&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV&gt;&lt;SPAN&gt;&lt;STRONG&gt;&lt;EM&gt;[Q.1]:&amp;nbsp;&lt;/EM&gt;&lt;EM&gt;I'm able to see consecutive frame on DSO for Tx Frame &amp;amp; Rx Frame. PFA, Is it correct ?&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR aria-hidden="true" /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;=&amp;gt; I am not sure. Because the frames that were sent on the bus were decided by Master. The master sends the header of the frame(Break, Sync, PID). The slave sends a response(Data, Checksum) if it is publisher of the PID. So, please recheck the master node and your .ldf file to know what the frames are sent.&lt;BR aria-hidden="true" /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;  &lt;/SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxf78987_0-1672899476132.png" style="width: 429px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/206153i75FC70670B095731/image-dimensions/429x186?v=v2" width="429" height="186" role="button" title="nxf78987_0-1672899476132.png" alt="nxf78987_0-1672899476132.png" /&gt;&lt;/span&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxf78987_1-1672899476140.png" style="width: 450px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/206155i3171F6E53AF6878C/image-dimensions/450x134?v=v2" width="450" height="134" role="button" title="nxf78987_1-1672899476140.png" alt="nxf78987_1-1672899476140.png" /&gt;&lt;/span&gt;
&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;&lt;SPAN&gt;[Q. 2] There is continuous set of 1 bit&amp;nbsp; between Tx and Rx frame. What are those and from which part of stack is it coming?&lt;/SPAN&gt;&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;DIV&gt;
&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxf78987_2-1672899476144.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/206154i86AD96EB34049D94/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxf78987_2-1672899476144.png" alt="nxf78987_2-1672899476144.png" /&gt;&lt;/span&gt;
&lt;P&gt;&lt;SPAN&gt;=&amp;gt; It is a Lin signal between lin . frames. When do not have any frames on the bus, the LIN bus is always set to high by LIN transceiver.&lt;/SPAN&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Dan&lt;/P&gt;</description>
      <pubDate>Thu, 05 Jan 2023 06:20:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Lin-Frame-Format/m-p/1577699#M19018</guid>
      <dc:creator>DanNguyenDuy</dc:creator>
      <dc:date>2023-01-05T06:20:44Z</dc:date>
    </item>
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