S12 / MagniV MicrocontrollersのトピックRe: Regarding LGx signal behaviour

Regarding LGx signal behaviour

pratibhasurabhi — Wed, 01 Jul 2020 12:52:41 GMT

Hi All,

This is regarding observing LGx signal behaviour during power up scenario.
Taking Hall sensor sample code(MC9S12ZVML128_BLDC_Hall) as reference, I am trying to observe LGx signals.
The MCU (MagniV S12 ZVML64) maskset is 3N95G.

FOPT register value is 0xFF

I am using RM V2.13

The initPMF() is as follows :
**********************************start***************************************
PMFCFG0_EDGEA = 1 /* Set Pair A PWM as edge aligned */
PMFCFG0_EDGEB = 1 /* Set Pair B PWM as edge aligned */
PMFCFG0_EDGEC = 1 /* Set Pair C PWM as edge aligned */
PMFCFG2_REV0 = 1 /* PWM generator A generates reload event */
PMFCFG2_REV1 = 0; /* PWM generator A generates reload event */
PMFOUTB = 0x2A; /* Low MOSFETs ON while SW control (Unipolar PWM) */
PMFCFG3_VLMODE = 1; /* Writing to value register zero also writes to value registers one to five */
PMFFQCA = 0; /* Reload every PWM, Half-cycle disabled, fcore / 1 */
PMFMODA = 2500; /* Apply PMF Modulo value */
PMFDTMA = 25; /* Set deadtime count */
PMFCFG2 |= 0x3F; /* Mask all PWM outputs */
PMFOUTC_OUTCTL = 0x3F; /* Set all outputs in Software mode */
PMFENCA_LDOKA = 1; /* Load prescalar A,modulus A and PMFVAL values into set of buffers */
PMFENCA_RSTRTA = 1; /* PWM will restart at commutation event */
PMFENCA_PWMENA = 1; /* Enable PWM Generator A */
PMFCFG1_ENCE = 1; /* Enable commutation event */
PMFENCA_GLDOKA = 1; /* External load OK replaces the function of LDOKA */
**********************************end**********************************************

I have observed these LGx signals for 4 combination of MCU<->PEMicro connection(Ribbon cable) and PEMicro<-> User System (Type a to Type B) connection status after flashing the firmware.
All these LGx signals are observed at power up.
I am attaching the table of combination and its result as reference.

1. Since the maskset is 3N95G, low side gate should be turned on, since at power up GSUF will be loaded with value in FOPT register. [GSUF bit will have value as 1] [Reference GDUF register description]
2. Also LGx will be turned off when initPMF() is executed, since the PWM are masked (PMFCFG2 = 0x3F).

So all things considered [ above two points], LGx should be turned on at power-up[FOPT value loaded] and will be turned off when initPMF is executed[mask PWM].

Q1. Request to confirm my understanding.

Q2. I have found some strange observation with respect #1 and #2 scenario as per the attached excel sheet
Request to inform why such different behaviour is observed for different combination of Ribbon cable(BDM interface) and USB cable connection status.
especially for #1 and #2
For #1, /RESET gradually rises while for others it rises sharply.

Also LGx signal behaviour is different.

More information in excel sheet.

Thanking in advance.

Re: Regarding LGx signal behaviour

danielmartynek — Wed, 01 Jul 2020 13:27:44 GMT

Hi Pratibha,

Can you read the GDUF register during the startup and clear the GLVLSF flag if set.

Please note that the flag cannot be cleared if the low voltage condition is still there.

Regards,

Daniel

Re: Regarding LGx signal behaviour

pratibhasurabhi — Thu, 02 Jul 2020 01:04:43 GMT

Hi danielmartynek‌,

As per the sample code, I have cleared the GLVLSF, in initCPMU() call before proceeding with the clock settings.

Re: Regarding LGx signal behaviour

danielmartynek — Fri, 03 Jul 2020 09:13:29 GMT

Hi Pratibha,

I don't have the 3N95G HW right now so I'm not able to test it.

Anyway, the debugger is not powered and it is an additional load on the reset pin, so the reset voltage is rising slowly which gives some time for the VLS_OUT output to stabilize before the MCU leaves reset (reset pin voltage > 0.65 * VDDX). And this means that the GLVLSF flag is not set, and the LS driver are active.

Whereas without the debugger, the reset pin read HIGH immediately probably before the VLS_OUT output is above the low-voltage threshold and this sets the GLVLSF flag.

When the GLVLSF flag is set, the LS drivers are inactive.

As you pointed out, the demo SW clear the flag in the initCPMU() function.

However, this is the code:

// Wait for stable supply after power up
while (GDUF_GLVLSF)
GDUF_GLVLSF = 1;‍‍‍

The GSUF flag is set in your application (copied from NVM during reset) along with the GLVLSF flag.

The code above does a read-modify-write operation on the register and therefore it clears the GLVLSF flag along with the GSUF flag. Because both the flags are w1c.

Therefore, once the GLVLSF flag gets cleared, the GSUF flag = 0 as well and the LS drivers stay inactive.

Could you please use this code instead:

// Wait for stable supply after power up
while (GDUF_GLVLSF)
GDUF = 0x20; // mask GLVLSF only‍‍‍‍‍‍

Thank you,

Regards,

Daniel

Re: Regarding LGx signal behaviour

pratibhasurabhi — Tue, 28 Jul 2020 08:00:50 GMT

Hi danielmartynek‌

I checked with suggested change in code.

It is correct

Regarding "The code above does a read-modify-write operation on the register and therefore it clears the GLVLSF flag along with the GSUF flag. Because both the flags are w1c."

My understanding was since we were accessing a specific bit, it wont affect the other bits/entire register.

Is this specific for w1c registers or is there a specific list. If possible can you please share the document or the link to it?

Thank you

Re: Regarding LGx signal behaviour

danielmartynek — Mon, 02 Nov 2020 14:39:03 GMT

Hi pratibhasurabhi,

Please have a look at AN2554/D Clearing and Disabling Interrupt Flags

// Wait for stable supply after power up
while (GDUF_GLVLSF)
GDUF_GLVLSF = 1;

// Wait for stable supply after power up
while (GDUF_GLVLSF)
GDUF = 0x20; // mask GLVLSF only

Regards,

Daniel

Re: Regarding LGx signal behaviour

pratibhasurabhi — Thu, 30 Jul 2020 01:26:29 GMT

Hi Daniel,

Thank you for sharing the document.