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    <title>S12 / MagniV Microcontrollers中的主题 initialization  RAM check for S12ZVL128</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024276#M17047</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello All&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;we are using&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;S12ZVL128. we enable ECC&amp;nbsp; for RAM. can you please help, is ECC test help to cover during initialization RAM&amp;nbsp; faults??or&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&amp;nbsp;we need to implement the pattern check&amp;nbsp; to cover initialization ram check&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 27 Feb 2020 12:01:17 GMT</pubDate>
    <dc:creator>premchand_chenn</dc:creator>
    <dc:date>2020-02-27T12:01:17Z</dc:date>
    <item>
      <title>initialization  RAM check for S12ZVL128</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024276#M17047</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello All&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;we are using&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;S12ZVL128. we enable ECC&amp;nbsp; for RAM. can you please help, is ECC test help to cover during initialization RAM&amp;nbsp; faults??or&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&amp;nbsp;we need to implement the pattern check&amp;nbsp; to cover initialization ram check&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Feb 2020 12:01:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024276#M17047</guid>
      <dc:creator>premchand_chenn</dc:creator>
      <dc:date>2020-02-27T12:01:17Z</dc:date>
    </item>
    <item>
      <title>Re: initialization  RAM check for S12ZVL128</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024277#M17048</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/premchand.chennupati@valeo.com"&gt;premchand.chennupati@valeo.com&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;I'm not sure if I understand, could you please elaborate?&lt;/P&gt;&lt;P&gt;Anyway, the SRAM is initialized with zeros during POR (&lt;A href="https://www.nxp.com/docs/en/reference-manual/MC9S12ZVLRM.pdf"&gt;Section 8.3.4, S12ZVL RM rev.2.48&lt;/A&gt;).&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/99090iEC776DBA9B548D43/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.freescale.com/files/microcontrollers/doc/user_guide/MC9S12ZVxSM.pdf"&gt;Safety Manual for MagniV SafetyDevices rev.2&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/99131iBFA173D5A0224305/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Feb 2020 13:53:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024277#M17048</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2020-02-27T13:53:56Z</dc:date>
    </item>
    <item>
      <title>Re: initialization  RAM check for S12ZVL128</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024278#M17049</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Daniel,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot for inputs&amp;nbsp;&lt;/P&gt;&lt;P&gt;normally we will do&amp;nbsp; &lt;STRONG&gt;pattern check&lt;/STRONG&gt; on RAM after every initialization, to check any RAM failures. instead of pattern check either &lt;STRONG&gt;ECC&lt;/STRONG&gt; will check ram failures after every initialization.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;No need to implement pattern check ??&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Feb 2020 04:21:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024278#M17049</guid>
      <dc:creator>premchand_chenn</dc:creator>
      <dc:date>2020-02-28T04:21:51Z</dc:date>
    </item>
    <item>
      <title>Re: initialization  RAM check for S12ZVL128</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024279#M17050</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/premchand.chennupati@valeo.com"&gt;premchand.chennupati@valeo.com&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The initialization after POR only initializes the SRAM to zeros along with the ECC information.&lt;BR /&gt;But it does not check for failures during the initialization.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;During an aligned memory write, no ECC check is performed.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/102723iECE168FAE557627A/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;The ECC check is performed when the SRAM is read.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/102758i22CE61AAEDF45BC3/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;It depends on your application requirements.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Mar 2020 09:18:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/initialization-RAM-check-for-S12ZVL128/m-p/1024279#M17050</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2020-03-03T09:18:05Z</dc:date>
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