S12 / MagniV MicrocontrollersのトピックRe: HCS12 external bus problems

HCS12 external bus problems

Koen — Wed, 04 Oct 2006 15:50:31 GMT

Hi all,

I'm trying to let the external databus work on my 9S12S256 device, but it doesn't work.

I want to acces external data in the paged bank. 8000 - C000 on PPAGE 0.

After start-up I set the mode register directly

MODE = 0xE0;

PEAR = 0x0C;

MISC = 0x01;

EBICTL = 0x00;

With this settings, the bus doesn't work. When I measure with the scoop, my clock seems to be OK. I don't see a R/W pulse.

My function is running in the common bank 0xC000 - 0xFFFF.

Ideas?

Thanks

Koen

Re: HCS12 external bus problems

blood — Mon, 09 Oct 2006 09:20:29 GMT

Have you configured the MODA, MODB and MODC hardware lines correctly? If the MODA line is held high at restart you will not be able to change these settings in software.

Re: HCS12 external bus problems

Koen — Mon, 09 Oct 2006 14:54:40 GMT

Hi,

Thanks for your answer!

MODA,B,C are configured with resistors.

It tried it once in normal expanded wide (all ones) and once in normal single chip. But there was no difference on the external databus...

Koen

Re: HCS12 external bus problems

blood — Tue, 10 Oct 2006 02:09:27 GMT

Is there any activity on the address/data lines (Port A and Port B) when you try to read or write to the external device? You should see activity on PA7 as the address is always 0x8000 or higher so that line should go high for the address cycle.

You need to do both a read and write to see a change in the state of the R/W line. If you are only doing reads then there will be no change in the state of the line.

Is the ECLK only active when you try to read or write or is it always there? If it is only there when you try to read or write to the device then you know that the external bus is being activated.

Re: HCS12 external bus problems

Koen — Tue, 10 Oct 2006 21:15:46 GMT

Hi,

There is some activity on the port A en B lines but there is no activity on PA7.

ECLK is running continously with this settings... R/W doesn't change at all.

Settings:

MODE   = 0xE0;
PEAR    = 0x0C;
EBICTL = 0x00;
MISC     = 0x01;

My code to read in the common bank:

PPAGE = 0;

*((unsigned short *)(0x8000)) = 0xAA00;
l_read = *((unsigned short *)(0x8000));

When I change the settings to

MODE   = 0xE3;
PEAR   = 0x0C;
EBICTL = 0x01;
MISC   = 0x0D;

With this settings I have no constant clock anymore. But also no R/W pulse....

Greetz koen

Re: HCS12 external bus problems

blood — Wed, 11 Oct 2006 02:52:07 GMT

Have you tried stepping through the code in assembly mode with a debugger and confirmed that it is trying to read and write to address 0x8000? If that is correct I don't know what is going on.

I use the 9s12e256 chip in normal expanded narrow mode and the assmbler code we use to get it into that mode is

       ldaa    #RDWE
       staa    PEAR
       ldaa    #MODC+MODA
       staa    MODE
       bset    MISC,EXSTR1+EXSTR0

then to write a word to address 0x8000 is

       ldaa    #0
       staa    PPAGE
       ldd     #$AA00
       std     $8000

and to read a word at address 0x8000 is

       ldaa    #0
       staa    PPAGE
       ldd     $8000

Re: HCS12 external bus problems

Koen — Thu, 12 Oct 2006 21:15:42 GMT

Hi,

Tanks for your help... my bus seems to be running fine now. Except my CS line, there is a lot of rubbish on it. Is it normal in my mode (normal expanded wide) ?? I have read that you only can use the CS if the ROMHM bit is set... but I don't know if it is correct.

Koen

Re: HCS12 external bus problems

blood — Fri, 13 Oct 2006 02:23:08 GMT

Sorry, I cant help you with that. I dont use the ECS line as we leave the device we are talking to always selected.