<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic SPI Communication in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-Communication/m-p/132175#M1666</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi, we are using an MC9S12C32 freescale processor.&lt;/DIV&gt;&lt;DIV&gt;We have configurated a working spi setup, with help of ftdi-chip usb controller, and using processor expert bean Syncroslave.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Write to processor works really fine, but our problem is reading, every now and then we received something else than micro processor sent...&lt;/DIV&gt;&lt;DIV&gt;Why? What can we do?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;thanks in advance Patrik&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 04 Oct 2006 12:43:11 GMT</pubDate>
    <dc:creator>patti</dc:creator>
    <dc:date>2006-10-04T12:43:11Z</dc:date>
    <item>
      <title>SPI Communication</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-Communication/m-p/132175#M1666</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi, we are using an MC9S12C32 freescale processor.&lt;/DIV&gt;&lt;DIV&gt;We have configurated a working spi setup, with help of ftdi-chip usb controller, and using processor expert bean Syncroslave.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Write to processor works really fine, but our problem is reading, every now and then we received something else than micro processor sent...&lt;/DIV&gt;&lt;DIV&gt;Why? What can we do?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;thanks in advance Patrik&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Oct 2006 12:43:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-Communication/m-p/132175#M1666</guid>
      <dc:creator>patti</dc:creator>
      <dc:date>2006-10-04T12:43:11Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Communication</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-Communication/m-p/132176#M1667</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Check if you are using the correct phase on clock signals and the correct sync timings. You must configure the SPI&amp;nbsp;control registers acconding to what you need.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Best regards&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 26 Oct 2006 08:35:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/SPI-Communication/m-p/132176#M1667</guid>
      <dc:creator>NetGhost</dc:creator>
      <dc:date>2006-10-26T08:35:29Z</dc:date>
    </item>
  </channel>
</rss>

