S12 / MagniV Microcontrollers中的主题 Re: S12X FIFO RXF flag

S12X FIFO RXF flag

ruicui — Mon, 11 Feb 2019 19:59:53 GMT

Dear sir/madam,

For S12X, I notice the MSCAN has five receive buffer. I am wondering how the queue works in details. For example: Say I am using polling method. When I see RXF is set, I retrieve the data from RxFG and reset RXF flag to 0. I assume this will only read one message, so three message left inside(if you don't consider RxBG), now:

1. Before another new message arrived, does RXF still keeps as 0?

2. By reading the "MC9S12XEP100" datasheet, it seems the answer is "Yes". Then if no more new message arrives, i can't retrieve the reset three messages because RXF = 0. Then the queue seems losing it's purpose and it can't handle the receive data burst.

3. If answer is "No", does the next storage message get pushed into the RxFG and set RXF = 1? This means if I want to read all the storage data, I have to poll multiple times or loop though RxFG until RXF is 0.

Please answer my (1)(2)(3) accordingly, this should clear up my misunderstandings.

Thanks,

Ray

Re: S12X FIFO RXF flag

kef2 — Tue, 12 Feb 2019 07:45:11 GMT

I retrieve the data from RxFG and reset RXF flag to 0. I assume this will only read one message, so three message left inside(if you don't consider RxBG), now:

As soon as you reset RXF, next RX buffer from FIFO is mapped to the memory map. RXF sets back to 1 if mapped buffer is full. RXF is not like any other flags, which you may prefer to clear at top or at bottom of your ISR. No, you need to read RX buffer, and only then reset RXF, not opposite, which may lead to data loss.

This means if I want to read all the storage data, I have to poll multiple times or loop though RxFG until RXF is 0.

Yes if polling. Using interrupts both ways are good: a) Read data, reset RXF and exit from ISR, or b) do {read_data(); clear_rxf();} while (rxf);.

Edward

Re: S12X FIFO RXF flag

ruicui — Tue, 12 Feb 2019 19:57:52 GMT

Hello Edward,

"As soon as you reset RXF, next RX buffer from FIFO is mapped to the memory map, RXF sets back to 1 if mapped buffer is full", to be clear:

1. "Rx buffer" means one(the next) of the Rx0/Rx1/Rx2/Rx3? (See my picture above)

2. "Memory map" means RxFG?

The reset of your statement make sense to me.

Thanks,

Ray

Re: S12X FIFO RXF flag

kef2 — Wed, 13 Feb 2019 07:24:46 GMT

1. yes

2. memory map is what is accessible to CPU, MSCANn registers are at one addresses, SCIn registers at different ones. RxFG is one of 5 MSCAN RX buffers mapped to address &CANxRXFG. (RxN aren't copied to RxFG, they are mapped to address space, something like memory chip select circuits with only one chip(buffer) driving data bus pins). All other non-RxFG buffers have no dedicated addresses in the memory map and are not readable to CPU until you let MSCAN map next non empty buffer to &CANxRXFG by clearing RXF flag.

Edward