topic Re: How to understand the PLL FM? in S12 / MagniV Microcontrollers

How to understand the PLL FM?

longlongli — Thu, 06 Dec 2018 07:48:40 GMT

S12ZVM Reference Manual says "FM1 and FM0 enable frequency modulation on the VCOCLK. This
is to reduce noise emission". How to understand that ?

In my understand, for example, PLL output ( VCOCLK ) set as 10MHz and FM set as '01', actual VCOCLK is 10±0.1%. Is that correct? How about FM off?

Best regards.

Re: How to understand the PLL FM?

dianabatrlova — Mon, 10 Dec 2018 09:48:50 GMT

Hi,

The frequency modulation PLL function will reduce the noise amplitude because it spreads this over a greater frequency range. If FM function is enabled it must be taken that maximum bus frequency is not exceeded.

- If frequency modulation is off (by default) IPLL block, try hold VCOCLK on one stable frequency.

- Additional frequency modulation of VCOCLK spreads frequency spectrum around VCOCLK.

So, if modulation is set as ’01’ the VCOCLK variation will be within +/- 1 %.

I hope it helps you.

Best Regards,

Diana

Re: How to understand the PLL FM?

longlongli — Tue, 11 Dec 2018 01:05:05 GMT

@Diana Batrlova

Hello Diana,

Thanks for your reply. I have one more question about that.

How do VCOCLK change if FM is enabled? In some rules, such as sine wave, or random.

Best Regards.

Re: How to understand the PLL FM?

dianabatrlova — Thu, 13 Dec 2018 08:20:20 GMT

Hello,

The frequency is in the triangle waveform.

I would like to at the note that if you don’t have a problem with EMC emission, rather don't use frequency modulation.

Best Regards,

Diana

Re: How to understand the PLL FM?

longlongli — Fri, 14 Dec 2018 09:04:15 GMT

Hello dianabatrlova‌

Actually, I have problems with EMC now. I saw below note in the manual. Does it mean that if I enable PM as '11', 4% variation, then bus clock must set to less than 46 MHz, considering that S12ZVM maximum bus clock is 50 MHz? If exceed the maximum clock, what will happen?

Thanks.

Re: How to understand the PLL FM?

dianabatrlova — Wed, 02 Jan 2019 15:39:01 GMT

Hello,

At first, I would like to apologize for the delay with my response.

The bus clock frequency range of S12ZVM is 1MHz - 50 MHz. This range should not be exceeded.

For example, if you are using 46 MHz bus clock freq. and +-4% FM you should consider that the bus clock frequency will be 44.16 MHz - 47.84 MHz. So, in this case, we are in the specified range.

If the maximum frequency of the bus clock is exceeded we cannot guarantee the correct behavior of the device.

There is a description in NVM Electrical Parameters in the RM rev. 2.11:

"The time base for all NVM program or erase operations is derived from the bus clock using the FCLKDIV
register. The frequency of this derived clock must be set within the limits specified as fNVMOP. The NVM
module does not have any means to monitor the frequency and will not prevent program or erase operation
at frequencies above or below the specified minimum."

I hope it helps you.

Best Regards,

Diana