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    <title>S12 / MagniV MicrocontrollersのトピックRe: MC9S12 XIRQ Interrupt - Software Trigger?</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12-XIRQ-Interrupt-Software-Trigger/m-p/828357#M15946</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tony, thanks for your input.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I'm reading your asm correctly, we first get the stack pointer into x; then do an indexed "bit set" of the top of stack, which should be the CCR which is going to be pulled by the following rti...?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I wonder if simply pushing the CCR, setting the bit and then pulling it again would provide a way of masking the XIRQ without having to perform an rti (and therefore be in an int rtn in the first place..)? Ie,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; pshc&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; bset&amp;nbsp; &amp;nbsp; _CR_,x,#X&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; pulc&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will be returning to this part of the project next week and hopefully I can try it out and offer some feedback....&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Next time I'll just use the IRQ...!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 04 Oct 2018 19:01:24 GMT</pubDate>
    <dc:creator>bigd</dc:creator>
    <dc:date>2018-10-04T19:01:24Z</dc:date>
    <item>
      <title>MC9S12 XIRQ Interrupt - Software Trigger?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12-XIRQ-Interrupt-Software-Trigger/m-p/828355#M15944</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Got a problem with an external UART connected to XIRQ on a Freescale MC9S12A64 processor...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This interrupt is &lt;STRONG&gt;non-maskable&lt;/STRONG&gt;; I cant change it or modify the hardware in any way due to legacy reasons. Also, the UART is connected via a couple of ports emulating an address and data bus. This makes UART register access a &lt;STRONG&gt;non-atomic&lt;/STRONG&gt; operation consisting of a number of CPU instructions to set up the address \ data bits and port direction..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Foreground read\write "to the UART" is done by reading \ writing RAM based ring buffers.&amp;nbsp;The XIRQ \ UART interrupt deals with read\ write from the RAM based ring buffers on the other side.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have reduced the reasons for foreground access to the UART down to just enabling the UART Tx interrupt when data is waiting in a RAM based ring buffer.&amp;nbsp; Unfortunately, this occasionally "collides" with the XIRQ interrupt routine requirement to transfer data&amp;nbsp;between the UART and ring buffers, resulting in data corruption.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I know I cant mask the XIRQ - (I believe I cant even turn it off once turned on). However, if I could get the XIRQ routine to trigger and pick up a flag to indicate "enable UART Tx interrupt", then all hardware accesses would be through the one interrupt routine, removing the problem with non-atomic collision.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Question - is there a way to trigger the XIRQ interrupt routine to run (as an interrupt!) using a code-based \ software access?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Sep 2018 13:31:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12-XIRQ-Interrupt-Software-Trigger/m-p/828355#M15944</guid>
      <dc:creator>bigd</dc:creator>
      <dc:date>2018-09-14T13:31:45Z</dc:date>
    </item>
    <item>
      <title>Re: MC9S12 XIRQ Interrupt - Software Trigger?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12-XIRQ-Interrupt-Software-Trigger/m-p/828356#M15945</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV class=""&gt;&amp;gt;I know I cant mask the XIRQ - (I believe I cant even turn it off once turned on). However, if I could get the XIRQ routine to trigger and pick up a flag to indicate "enable UART Tx interrupt", then all hardware accesses would be through the one interrupt routine, removing the problem with non-atomic collision.&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;For the 68HC11, there is a trick to mask the XIRQ interrupt.&amp;nbsp; It may also work in the 9S12A64 MCU.&amp;nbsp; Not sure though, you would have to try it.&amp;nbsp; The trick is to set the saved CCR[X] flag from within the XIRQ handler and the final RTI will restore to CCR[X]=1.&amp;nbsp; However, this cannot be achieved with a simple TAP instruction.&amp;nbsp; Example assembly language sequence:&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; tsx&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; bset&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; _CCR_,x,#X.&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;Disable further XIRQs&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; rti&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Question - is there a way to trigger the XIRQ interrupt routine to run (as an interrupt!) using a code-based \ software access?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Assuming your SWI interrupt is not used otherwise, you could move the XIRQ code to the SWI interrupt (callable with the SWI instruction), and simply use a JMP to the SWI handler from within the XIRQ handler.&amp;nbsp; This way it can be called manually, and automatically, as needed.&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Sep 2018 18:32:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12-XIRQ-Interrupt-Software-Trigger/m-p/828356#M15945</guid>
      <dc:creator>tonyp</dc:creator>
      <dc:date>2018-09-14T18:32:15Z</dc:date>
    </item>
    <item>
      <title>Re: MC9S12 XIRQ Interrupt - Software Trigger?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12-XIRQ-Interrupt-Software-Trigger/m-p/828357#M15946</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tony, thanks for your input.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I'm reading your asm correctly, we first get the stack pointer into x; then do an indexed "bit set" of the top of stack, which should be the CCR which is going to be pulled by the following rti...?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I wonder if simply pushing the CCR, setting the bit and then pulling it again would provide a way of masking the XIRQ without having to perform an rti (and therefore be in an int rtn in the first place..)? Ie,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; pshc&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; bset&amp;nbsp; &amp;nbsp; _CR_,x,#X&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; pulc&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will be returning to this part of the project next week and hopefully I can try it out and offer some feedback....&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Next time I'll just use the IRQ...!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 04 Oct 2018 19:01:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/MC9S12-XIRQ-Interrupt-Software-Trigger/m-p/828357#M15946</guid>
      <dc:creator>bigd</dc:creator>
      <dc:date>2018-10-04T19:01:24Z</dc:date>
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