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    <title>S12 / MagniV MicrocontrollersのトピックRe: When a device interrupt occurs, how does the processor determine which device issued the interrupt?</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/When-a-device-interrupt-occurs-how-does-the-processor-determine/m-p/807334#M15797</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;BR /&gt;You can refer to the reference manual of the core:&lt;BR /&gt;&lt;A href="https://www.nxp.com/docs/en/reference-manual/S12XCPUV2.pdf"&gt;CPU12/CPU12X - Reference Manual&lt;/A&gt;&lt;/P&gt;&lt;P&gt;But the description is rather generic:&lt;BR /&gt; &lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/73384i0FEAB434DF08D90E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;BR /&gt;Basically, the interrupts must be locally enabled and their interrupt flags must be set to be recognized as pending.&lt;BR /&gt;In such a situation when an interrupt triggers but its flag is cleared before its vector is fetched and there is no other interrupt pending, the spurious vector is fetched instead.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/73385iB3F73506EA1C194A/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 02 Aug 2018 13:36:29 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2018-08-02T13:36:29Z</dc:date>
    <item>
      <title>When a device interrupt occurs, how does the processor determine which device issued the interrupt?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/When-a-device-interrupt-occurs-how-does-the-processor-determine/m-p/807333#M15796</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;While studying The interrupt module in Datasheet of &lt;A href="https://www.nxp.com/docs/en/data-sheet/MC9S12XEP100RMV1.pdf"&gt;MC9S12XEP100&lt;/A&gt; family&amp;nbsp;&lt;/P&gt;&lt;P&gt;I had This Doubt " How Interrupt control module decides which interrupt has occured? when Interrupt happens."&lt;/P&gt;&lt;P&gt;For Example&amp;nbsp;&lt;/P&gt;&lt;P&gt;" If Timer Interrupt occurs How INIT module find this Interrupt was caused by Timer Module ?"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Data Sheet:&amp;nbsp;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/data-sheet/MC9S12XEP100RMV1.pdf" title="https://www.nxp.com/docs/en/data-sheet/MC9S12XEP100RMV1.pdf"&gt;https://www.nxp.com/docs/en/data-sheet/MC9S12XEP100RMV1.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in Advance&amp;nbsp;:smileyhappy:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Haricharan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Aug 2018 14:18:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/When-a-device-interrupt-occurs-how-does-the-processor-determine/m-p/807333#M15796</guid>
      <dc:creator>haricharanreddy</dc:creator>
      <dc:date>2018-08-01T14:18:16Z</dc:date>
    </item>
    <item>
      <title>Re: When a device interrupt occurs, how does the processor determine which device issued the interrupt?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/When-a-device-interrupt-occurs-how-does-the-processor-determine/m-p/807334#M15797</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;BR /&gt;You can refer to the reference manual of the core:&lt;BR /&gt;&lt;A href="https://www.nxp.com/docs/en/reference-manual/S12XCPUV2.pdf"&gt;CPU12/CPU12X - Reference Manual&lt;/A&gt;&lt;/P&gt;&lt;P&gt;But the description is rather generic:&lt;BR /&gt; &lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/73384i0FEAB434DF08D90E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;BR /&gt;Basically, the interrupts must be locally enabled and their interrupt flags must be set to be recognized as pending.&lt;BR /&gt;In such a situation when an interrupt triggers but its flag is cleared before its vector is fetched and there is no other interrupt pending, the spurious vector is fetched instead.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/73385iB3F73506EA1C194A/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Aug 2018 13:36:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/When-a-device-interrupt-occurs-how-does-the-processor-determine/m-p/807334#M15797</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2018-08-02T13:36:29Z</dc:date>
    </item>
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