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    <title>topic Re: External memory and peripherals in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/External-memory-and-peripherals/m-p/130982#M1483</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;This is not possible with an S12.&lt;/DIV&gt;&lt;DIV&gt;The external bus has the S12 as a Master.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Alban.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 20 Apr 2007 21:47:31 GMT</pubDate>
    <dc:creator>Alban</dc:creator>
    <dc:date>2007-04-20T21:47:31Z</dc:date>
    <item>
      <title>External memory and peripherals</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/External-memory-and-peripherals/m-p/130981#M1482</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;I want a mode of HCS12 to have the following configuration:&lt;/DIV&gt;&lt;DIV&gt;1- Use the internal memory map including registers, eeprom, ram and a part of (no)banked-flash, as in normal single chip.&lt;/DIV&gt;&lt;DIV&gt;2- Add an external parallel RAM device, for example 1 Megabyte (20 bits) for aquisition data storage.&lt;/DIV&gt;&lt;DIV&gt;3- Add an external parallel peripheral such an ADConverter, 12 bits resolution .&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The control of these elements must be done by external bus, not by I/O ports.&lt;/DIV&gt;&lt;DIV&gt;The internal flash must visible for loading and execution program .&lt;/DIV&gt;&lt;DIV&gt;I read very quicly appliaction note AN2408, is it a good beginning?&lt;/DIV&gt;&lt;DIV&gt;Thanks&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 18 Apr 2007 15:26:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/External-memory-and-peripherals/m-p/130981#M1482</guid>
      <dc:creator>lotfiB</dc:creator>
      <dc:date>2007-04-18T15:26:44Z</dc:date>
    </item>
    <item>
      <title>Re: External memory and peripherals</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/External-memory-and-peripherals/m-p/130982#M1483</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;This is not possible with an S12.&lt;/DIV&gt;&lt;DIV&gt;The external bus has the S12 as a Master.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Alban.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Apr 2007 21:47:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/External-memory-and-peripherals/m-p/130982#M1483</guid>
      <dc:creator>Alban</dc:creator>
      <dc:date>2007-04-20T21:47:31Z</dc:date>
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