topic Re: S12ZVLA ADC sampling time in S12 / MagniV Microcontrollers

S12ZVLA ADC sampling time

vyshakhj — Mon, 05 Feb 2018 09:03:53 GMT

Hi,

I need information regarding the precise calculation of ADC sampling time, please go through the controller and configuration that I am using:

Controller: S12ZVLA96

f_bus(bus frequency): 32Mhz

ADC : 6-channel 10 bit

ADC operating mode: Restart Mode, Single access mode

ADC Command sequence list length: 36

Please help me with the information on, what will be the time required for completing conversion of one channel, once a command in command list has been loaded.

As per data sheet I found two calculation related to ADC sampling time, below I mentioned those two formula,

1) Conversion time = 5 Bus cycles + 2 ADC conversion cycles

2) Total Sample time = Buffer sample time + Final Sample time

= 2 ADC CLK + 2 ADC CLK

Can you provide how to correlate these two equations, and what will be the total time required for completing the 36 commands , for the above configuration?

Thanks ,

Vyshakh J

Re: S12ZVLA ADC sampling time

danielmartynek — Tue, 06 Feb 2018 11:28:40 GMT

Hi Vyshakh,

The ADC module needs a trigger to start sampling the first channel in Restart Mode.

It takes 2 BUS cycles + 2 ADC Cycles (pump phase) from the Trigger Event (bit TRIG set) until the select channel starts to sample. The pump phase (buffer sample time) is already a part of the Total Sample Time (N = SMP[4:0]), as described in Figure 10-28.

And the Total Sample Time is a part of the entire ADC Conversion Period (Table C-1 ADC Operating Characteristics).

10-bit resolution:

min. 18 ADC cycles (4 S + 14 C)

max. 38 ADC cycles (24 S + 14 C)

During a conversion sequence (back to back conversions) it takes five Bus Clock cycles plus two ADC conversion clock cycles (pump phase) from current conversion period end until the newly selected channel is sampled in the following conversion period.

Again, the pump phase is a part of the Total Sample Time (N = SMP[4:0]).

The conversion time of 36 commands after Trigger event in Restart mode is:

2 BUS cycles + (36 * ADC Conversion Period (18 – 38 ADC cycles)) + ((36-1) * 5 BUS cycles between two conversions).

Regards,

Daniel

Re: S12ZVLA ADC sampling time

vyshakhj — Wed, 07 Feb 2018 13:05:54 GMT

Hi Daniel,

Thanks for your information, it was really helpful. But here ,I have one more query , please go through the below comments,

Out of 36 command in command sequence list, some of the command is for discharging the internal capacitance and one command for temperature sensor sampling

* What will be the time required for completing 'discharge internal capacitance' command? Is it same as ADC conversion time?

Thanks,

Vyshakh J

Re: S12ZVLA ADC sampling time

danielmartynek — Wed, 07 Feb 2018 18:40:16 GMT

Hi Vyshakh,

Each command specifies the length of the sample time in ADC cycles.

ADCCMD_2_SMP[4:0]. So it depends on that.

Regards,

Daniel