S12 / MagniV MicrocontrollersのトピックRe: Constant COP Reset

Constant COP Reset

rmaier — Wed, 05 Jul 2017 23:42:47 GMT

I am trying to help a colleague who is writing in ASM try to debug a persistent reset. It happens at 16.xxx seconds like clock work. The unit runs for 16 seconds, triggers a reset and runs for another 16s. The reset appears to be caused by the COP watchdog. We are using an MC9S12P MCU. The code is applied from an existing platform that has been working for some time. Basically the same platform with more I/O. So, we are confused as to why we are seeing problems here. The MCU is running at 16 MHz.

I am not sure where to start. So, I will begin with the clock initialization. Here's the code snippet.

ldaa       #$26            ; old. Allow access to CPU clock settings    
staa       CPMUPROT
movb                                   #%10000011,CPMUCLKS    ; turn on PLL. Run RTI from OSCCLK   
movb       #%00000000,CPMUHTCTL   ; not reading the internal temp sensor 
movb       #%00001111,CPMUSYNR    ; set the freq reduction to obtain F-ref 
movb       #%00001111,CPMUREFDIV  ; set divider to get F-ref from crystal freq 
movb       #%00000000,CPMUPOSTDIV
movb       #%11000001,CPMUOSC     ; turn on the external oscillator  
ldaa       #1
staa                                   CPMUPROT ‍‍‍‍‍‍‍‍‍‍

We have tried writing 0x00 to the CPMUCOP to no avail. We are a little confused as to the statement in the COP Control Register Description stating "When a non-zero value is loaded from Flash to CR[0:2] the COP time-out period is started." Where in flash is this value, and how do you change it?

A vague question will get a vague answer, but I hope it will move us in the right direction. Thanks!

Re: Constant COP Reset

rmaier — Thu, 06 Jul 2017 13:57:52 GMT

One more thing to add. While the MCU is running, the CPMUCOP register shows 0b10000111. So, Window COP Mode and 2^24 cycles for COP Watchdog Timer Rate. Even if we initialize CPMUCOP = 0. Does the CPMUCOP need to be initialized in a special location?

Re: Constant COP Reset

danielmartynek — Thu, 06 Jul 2017 13:58:14 GMT

Hi,

During the reset sequence, CPMUCOP register is initialized based on a value stored in FOPT byte at the address 0x3_FF0E. FOPT bits [2:0] are negated and loaded to bits CR[2:0] in CPMUCOP register. This will set the watchdog time-out.

Please check what value is stored at the address.

If the FOPT contains default value 0xFF then the watchdog is disabled.

So, if you write 0xFF to FOPT then, after next reset, the watchdog will be disabled.

//set FOPT = 0xFF at 0xFF0E

//place the constant at address 0xFF08

const unsigned char flash_array[] @0xFF08= {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFE};

Regards,

Daniel

Re: Constant COP Reset

rmaier — Fri, 07 Jul 2017 12:56:41 GMT

That was the trick. Many thanks for your help!