S12 / MagniV MicrocontrollersのトピックRe: S12XE BDM Communication Loss

S12XE BDM Communication Loss

andradetj — Tue, 04 Jul 2017 18:16:52 GMT

Hi. I have a new board which uses MC9S12XEQ512. I can program the board any number of times without any problems. But when I start the code, after some unspecified time, my Multilink Interface seems to lose communication with the MCU, and all variables read "0" (zero). The board keeps running, I can interact with it (external world), but without any debug info.

If I try to HALT, nothing happens (maybe because it's a command), and I can only RESET the board. Then it starts ok, and after some time it all happens again.

It's almost like the MCU is holding the BKGD pin LOW.

I've attached some pictures of oscilloscope probing BKGD pin, and also HIWAVE protocol logs.

Some Info:

External Crystal: 4 MHz.

Using PLL on Full Swing Pierce Oscillator Circuit.

PLLCLOCK = 80MHz

BUSCLOCK = 40MHZ

Initialization Code:

PLLCTL = 0b11001001;
REFDV = 0x40;
SYNR = 0x49;
POSTDIV = 0;

while (!CRGFLG_LOCK) {
}

CLKSEL = 0b11000000;

XCLKS pin has a pull-down at all times.

There is a strong external pull-up on RESET pin (10k to 3V3). I also tried removing it, same outcome.

Tried using Multilink Universal Rev.A (flash version 6.15) and Multilink Universal Rev.C. I've already changed cables, power sources and so on, same outcome.

Any tips?

Thanks in advance.

Original Attachment has been moved to: DUMP_COMM.txt.zip

Re: S12XE BDM Communication Loss

danielmartynek — Wed, 05 Jul 2017 12:26:10 GMT

Hello,

Have you tried measuring the reset pin? Because the MCU is disconnected from the debugger when a reset occurs. You may also try to connect the debugger to the MCU (while it is running) through Hotsync instead of Connect(Reset).

Regards,

Daniel

Re: S12XE BDM Communication Loss

andradetj — Wed, 05 Jul 2017 17:35:58 GMT

Hi Daniel,

RESET pin is 3.3V at all times. Hotsync does not work.

I've changed the approach. Enabled CRG PLL LOCK Interrupt with a global variable counter, and compared two boards.

A "good" board generated around 30 interrupts in a 15 minute run.

A "bad" board generated around 400 interrupts in a 1 minute run.

Interrupt Code:

interrupt void ISR_PLL_LOCK (void){
CRGFLG_LOCKIF = 1;
if (CRGFLG_LOCK == 0) {
while (!CRGFLG_LOCK) { }
CLKSEL_PLLSEL = 1;
DEBUG.LOSS_OF_CLOCK_COUNTER++;
}

}

Could this cause the BDM Communication Issue?

What could cause the Loss of Lock?

Regards,

Re: S12XE BDM Communication Loss

danielmartynek — Thu, 06 Jul 2017 12:20:16 GMT

Hi,

The loss of clock is probably the reason. The behavior then might be unpredictable.

Have you measured the external clock? The amplitude must be 1.8V.

You may also measure Bus clock on ECLK pin (ECLKCTL[NECLK = 0]).

An example code of PLL initialization is attached.

Regards,

Daniel