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    <title>topic Re: Regarding S12ZVM128. in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636804#M13559</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Hi Pratibha,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Every ADC command is configured by 4-byte configuration (ADCCMD_0 ~ ADCCMD_3).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Since these commands are loaded into ADC automatically by DMA, they must be aligned to 4-byte boundary.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The definitions in adc_lba.h file just offers user-friendly way how to configure these commands.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;For example:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define INTFLG_SEL(x)&amp;nbsp; ((unsigned long)((x)&amp;amp;0x0F)&amp;lt;&amp;lt;24) //Conversion Interrupt Flag Select 1..15, 0 means conversion without interrupt flag&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;It just take lowest 4 bits from x value and move it 24 times to left into ADCCMD_0_ INTFLG_SEL[3:0] position.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The INTFLG_SEL[3:0] configure selected interrupt flag by simple binary combination value.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;So, if we use INTFLG_SEL(5), the ADCCMD_0_INTFLG_SEL[3:0] will be configured as 0b0101 and ADC will set appropriate interrupt flag (in this case CON_IF[15:1]= 0x0010) when this command finish.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The ADCCONIF_CON_IF[15:1] display which flag was set. A single flag bit in CON_IF[15:1] refers to single INTFLG_SEL[3:0] bit combination.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The INTFLG_SEL(0) configuration will not set any of CON_IF[15:1] flags when command finish. When ADC command is configured as End Of Sequence/End Of List/End Of List and wait... command the ADCCONIF_EOL_IF flag may signalize end of the measurement sequence.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope it helps you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Radek&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 03 Jan 2017 09:49:51 GMT</pubDate>
    <dc:creator>RadekS</dc:creator>
    <dc:date>2017-01-03T09:49:51Z</dc:date>
    <item>
      <title>Regarding S12ZVM128.</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636801#M13556</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am using MTRCKTSBNZVM128 evaluation board.I want to trigger the ADC by software using trigger mode without configuring the PMF,TIM and PTU. Could you please suggest me how to do this?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Dec 2016 06:49:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636801#M13556</guid>
      <dc:creator>pratibhasurabhi</dc:creator>
      <dc:date>2016-12-23T06:49:24Z</dc:date>
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    <item>
      <title>Re: Regarding S12ZVM128.</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636802#M13557</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Hi Preatibha,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;You may use voltage measurement example as your inspiration:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-332475"&gt;https://community.nxp.com/docs/DOC-332475&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The trigger is managed by command:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10.0pt;"&gt;ADC0FLWCTL_TRIG = 1;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //Trigger for next new conversion&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10.0pt;"&gt;The ACC_CFG bits in ADC0CTL_0 register should be configured either for Single Access Mode - Data Bus or Dual Access Mode.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope it helps you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Radek&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Dec 2016 13:00:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636802#M13557</guid>
      <dc:creator>RadekS</dc:creator>
      <dc:date>2016-12-23T13:00:11Z</dc:date>
    </item>
    <item>
      <title>Re: Regarding S12ZVM128.</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636803#M13558</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for the quick reply.If you could explain the&amp;nbsp;#define INTFLG_SEL(x) and&amp;nbsp;INT_FLG(x) left shifting in adc_lba.h file,it will be great.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Dec 2016 13:40:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636803#M13558</guid>
      <dc:creator>pratibhasurabhi</dc:creator>
      <dc:date>2016-12-23T13:40:18Z</dc:date>
    </item>
    <item>
      <title>Re: Regarding S12ZVM128.</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636804#M13559</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Hi Pratibha,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Every ADC command is configured by 4-byte configuration (ADCCMD_0 ~ ADCCMD_3).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Since these commands are loaded into ADC automatically by DMA, they must be aligned to 4-byte boundary.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The definitions in adc_lba.h file just offers user-friendly way how to configure these commands.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;For example:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define INTFLG_SEL(x)&amp;nbsp; ((unsigned long)((x)&amp;amp;0x0F)&amp;lt;&amp;lt;24) //Conversion Interrupt Flag Select 1..15, 0 means conversion without interrupt flag&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;It just take lowest 4 bits from x value and move it 24 times to left into ADCCMD_0_ INTFLG_SEL[3:0] position.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The INTFLG_SEL[3:0] configure selected interrupt flag by simple binary combination value.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;So, if we use INTFLG_SEL(5), the ADCCMD_0_INTFLG_SEL[3:0] will be configured as 0b0101 and ADC will set appropriate interrupt flag (in this case CON_IF[15:1]= 0x0010) when this command finish.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The ADCCONIF_CON_IF[15:1] display which flag was set. A single flag bit in CON_IF[15:1] refers to single INTFLG_SEL[3:0] bit combination.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The INTFLG_SEL(0) configuration will not set any of CON_IF[15:1] flags when command finish. When ADC command is configured as End Of Sequence/End Of List/End Of List and wait... command the ADCCONIF_EOL_IF flag may signalize end of the measurement sequence.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope it helps you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Radek&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Jan 2017 09:49:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Regarding-S12ZVM128/m-p/636804#M13559</guid>
      <dc:creator>RadekS</dc:creator>
      <dc:date>2017-01-03T09:49:51Z</dc:date>
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