Regarding motor commutation for S12ZVML128

pratibhasurabhi — Mon, 09 Jan 2017 08:06:13 GMT

I have to rotate motor for S12ZVML128 in open loop.I have configured the PMF,TIM,ADC.Tell me the configuration for the motor commutation.Is it necessary to set PTUC_PTULDOK bit to 1 for motor commutation?

Re: Regarding motor commutation for S12ZVML128

RadekS — Mon, 16 Jan 2017 19:11:00 GMT

Hi Pratibha,

The load okay bit, LDOK, enables loading the PWM generator with:

A prescaler divisor—from the PRSC bits in PMFFQC register
A PWM period—from the PWM counter modulus registers
A PWM pulse width—from the PWM value registers

We typically do not update prescaler, period or duty during open loop mode. So, we do not need to PTUC_PTULDOK bit to 1 for motor commutation.

The motor commutation is typically managed by TIM0_OC0 event. See Table 1-21. Control Loop Events in RM. So, we may for example invoke commutation by:

TIM0CFORC_FOC0 = 1; // force commutation event (apply first commutation sector)

The next commutation events are managed by TIM0TC0 register update. For example:

TIM0TC0 = TIM0TCNT + NextCmtPeriod;

TIM0TC0 = timeCommutation + NextCmtPeriod; // alignment + open loop

The PMF output signals are generated by per PMFCFG2, PMFOUTC_OUTCTL update in every commutation event (TC0 ISR). For example:

PMFCFG2 = 0x40 + MaskVal[NextCmtSector]; // will be applied at the next commutation

PMFOUTC_OUTCTL = OutCtl[NextCmtSector]; // will be applied at the next commutation

I hope it helps you.

Have a great day,
Radek

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topic Regarding motor commutation for S12ZVML128 in S12 / MagniV Microcontrollers

Regarding motor commutation for S12ZVML128

Re: Regarding motor commutation for S12ZVML128