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    <title>S12 / MagniV Microcontrollersのトピック9S12XEG128, sci3</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12XEG128-sci3/m-p/576681#M12878</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear all,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt; i am working on a prototype with 9S12XEG128 (112 QFP) that wires SCI0 to SCI3 serial ports to the circuit.&lt;/P&gt;&lt;P&gt;I can output serial bytes on TX for SCI0, SCI1 and SCI2. Nothing on SCI3.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From NXP document comparison tables, seems this mcu has only 2 SCI ports, but from my tests i can use 3 of them.&lt;/P&gt;&lt;P&gt;So any clarification is really appreciated.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Many thanks&lt;/P&gt;&lt;P&gt;angelo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 15 Jul 2016 14:43:27 GMT</pubDate>
    <dc:creator>angelo_d</dc:creator>
    <dc:date>2016-07-15T14:43:27Z</dc:date>
    <item>
      <title>9S12XEG128, sci3</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12XEG128-sci3/m-p/576681#M12878</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear all,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt; i am working on a prototype with 9S12XEG128 (112 QFP) that wires SCI0 to SCI3 serial ports to the circuit.&lt;/P&gt;&lt;P&gt;I can output serial bytes on TX for SCI0, SCI1 and SCI2. Nothing on SCI3.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From NXP document comparison tables, seems this mcu has only 2 SCI ports, but from my tests i can use 3 of them.&lt;/P&gt;&lt;P&gt;So any clarification is really appreciated.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Many thanks&lt;/P&gt;&lt;P&gt;angelo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Jul 2016 14:43:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12XEG128-sci3/m-p/576681#M12878</guid>
      <dc:creator>angelo_d</dc:creator>
      <dc:date>2016-07-15T14:43:27Z</dc:date>
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    <item>
      <title>Re: 9S12XEG128, sci3</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12XEG128-sci3/m-p/576682#M12879</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Angelo,&lt;/P&gt;&lt;P&gt;Officially, the 9S12XEG128 (112 QFP) has only 2 SCI modules (SCI0 and SCI1).&lt;/P&gt;&lt;P&gt;The current S12XE derivatives with 128kB and 256kB flash shares the same maskset.&lt;/P&gt;&lt;P&gt;So, the silicon contains 4 SCI channels. The additional two SCI modules as other additional Flash/RAM/modules are not fully tested in case of 128kB derivatives.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However there is important note from D.2 Pinout explanations chapter in RM:&lt;/P&gt;&lt;P&gt;“Versions with 4 SCI modules will have SCI0, SCI1, SCI2 and SCI4.”&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, the 128kB and 256kB derivatives simply do not contain SCI3 module. Instead of them, you may use SCI4.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope it helps you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Radek&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Jul 2016 08:07:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/9S12XEG128-sci3/m-p/576682#M12879</guid>
      <dc:creator>RadekS</dc:creator>
      <dc:date>2016-07-18T08:07:24Z</dc:date>
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