S12 / MagniV Microcontrollers中的主题 Re: Relocating interrupt vector table for s12zvc

Relocating interrupt vector table for s12zvc

kiranbhat — Mon, 27 Jun 2016 05:25:47 GMT

I am using s12zca192 controller, i am finding diffculty in relocating interrupt vector table. There are some regidters like IVBR byt not clear of how to use it. I wanted an example of how to relocate interrupt vector table.

Regards

Kiran Bhat

Re: Relocating interrupt vector table for s12zvc

RadekS — Wed, 29 Jun 2016 12:33:50 GMT

I prepared for you very simple example project with relocated interrupt vector table into RAM/Flash.

See attachment.

I hope it helps you.

Have a great day,
Radek

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

Re: Relocating interrupt vector table for s12zvc

kiranbhat — Wed, 29 Jun 2016 20:05:22 GMT

Hi Radek

Thanks for the example. But i have one issue, whichever interrupt is configured each time on Unimplemented section is executed. I am pasting the code (Not able to attach the project) please check and correct me where i am wrong.

/*****************************Mani.c**********************************************/

#include <hidef.h> /* for EnableInterrupts macro */

#include "derivative.h" /* include peripheral declarations */

//#include "VectorTable.h"

void BSP_PIM_HLUWAKE_Interrupt_Enable(void);

unsigned int i;

void main(void)

{

//IVBR=(INT_VECTOR_TABLE_ADDR_IN_FLASH & 0xFFFFFE)>>8;

IVBR = 0xFEC4;

DDRP_DDRP0 = 1;

DDRP_DDRP4 = 1;

DDRP_DDRP5 = 1;

PTP_PTP0 = 1;

PTP_PTP4 = 1;

PTP_PTP5 = 1;

BSP_PIM_HLUWAKE_Interrupt_Enable();

EnableInterrupts;

/* include your code here */

for(;;)

{

PTP_PTP0 = ~PTP_PTP0;

for(i = 0; i< 20000; i++);

}

void BSP_PIM_HLUWAKE_Interrupt_Enable(void)

{

/*configure port AD for KWU feature*/

DDRAD_DDRADL3 = 0; /* Configure PAD3 as input */

DIENADL_DIENADL3 = 1; /* Pin is configured as digital input */

PERAD_PERADL3 = 0; /* Enable Pull Device on PAD3 */

PPSAD_PPSADL3 = 1; /* Configure interrupt for Rising Edge */

PIEAD_PIEADL3 = 1; /* Enable Interrupt on PAD3 (KWAD3) */

}

/***************************** End Mani.c**********************************************/

/******************************VectorTable.c*****************************************/

* VectorTable.c

* Created on: Jun 29, 2016

* Author: kiran.bhat

#include "VectorTable.h"

//==============================================================================

// Unimplemented_ISR

//==============================================================================

interrupt void Unimplemented_ISR(void)

{

//PTP_PTP5 = ~PTP_PTP5;

//PIFADL_PIFADL3 = 1;

asm NOP; //place breakpoint here

}

interrupt void WakeUpISR(void)

{

PIFADL_PIFADL3 = 1;

PTP_PTP4 = ~PTP_PTP4;

}

/***************************** End VectorTable.c**********************************************/

/******************************VectorTable.h*****************************************/

/******************************End VectorTable.h*****************************************/

Regards

Kiran

Re: Relocating interrupt vector table for s12zvc

kiranbhat — Wed, 29 Jun 2016 20:08:35 GMT

/******************************VectorTable.h*****************************************/

* VectorTable.h

* Created on: Jun 29, 2016

* Author: kiran.bhat

#ifndef VECTORTABLE_H_

#define VECTORTABLE_H_

#include "derivative.h" /* include peripheral declarations */

#define INT_VECTOR_TABLE_ADDR_IN_FLASH 0xFEC400

#define INT_VECTOR_TABLE_SIZE 123

//Please see prm linker file where we removed area with vector table from linker usage.

/* ISR prototype */

interrupt void WakeUpISR(void);

interrupt void Unimplemented_ISR(void);

//vector table defined in Flash

typedef void (*const tIsrFunc)(void);

/* Pack 3 byte pointers as 4 byte Interrupt Vector Table entries */

typedef struct

{

byte padding;

tIsrFunc address;

} InterruptTableEntry;

#define _VECTOR(v) {0xFFU, &v}

//Please replace aprropriate Unimplemented_ISR by implemented interrupt routine

//see Table 1-13. Interrupt Vector Locations in RM for more details

const InterruptTableEntry _InterruptVectorTable[INT_VECTOR_TABLE_SIZE] @INT_VECTOR_TABLE_ADDR_IN_FLASH = { /* Interrupt vector table */

_VECTOR(Unimplemented_ISR),//0x00 VReserved123

_VECTOR(Unimplemented_ISR),//0x04 VReserved122

_VECTOR(Unimplemented_ISR),//0x08 VReserved121

_VECTOR(Unimplemented_ISR),//0x0C VReserved120

_VECTOR(Unimplemented_ISR),//0x10 VReserved119

_VECTOR(Unimplemented_ISR),//0x14 VReserved118

_VECTOR(Unimplemented_ISR),//0x18 VReserved117

_VECTOR(Unimplemented_ISR),//0x1C VReserved116

_VECTOR(Unimplemented_ISR),//0x20 VReserved115

_VECTOR(Unimplemented_ISR),//0x24 VReserved114

_VECTOR(Unimplemented_ISR),//0x28 VReserved113

_VECTOR(Unimplemented_ISR),//0x2C VReserved112

_VECTOR(Unimplemented_ISR),//0x30 VReserved111

_VECTOR(Unimplemented_ISR),//0x34 VReserved110

_VECTOR(Unimplemented_ISR),//0x38 VReserved109

_VECTOR(Unimplemented_ISR),//0x3C VReserved108

_VECTOR(Unimplemented_ISR),//0x40 VReserved107

_VECTOR(Unimplemented_ISR),//0x44 VReserved106

_VECTOR(Unimplemented_ISR),//0x48 VReserved105

_VECTOR(Unimplemented_ISR),//0x4C Vsenttx

_VECTOR(Unimplemented_ISR),//0x50 Viic

_VECTOR(Unimplemented_ISR),//0x54 VReserved102

_VECTOR(Unimplemented_ISR),//0x58 VReserved101

_VECTOR(Unimplemented_ISR),//0x5C VReserved100

_VECTOR(Unimplemented_ISR),//0x60 VReserved99

_VECTOR(Unimplemented_ISR),//0x64 VReserved98

_VECTOR(Unimplemented_ISR),//0x68 VReserved97

_VECTOR(Unimplemented_ISR),//0x6C VReserved96

_VECTOR(Unimplemented_ISR),//0x70 VReserved95

_VECTOR(Unimplemented_ISR),//0x74 VReserved94

_VECTOR(Unimplemented_ISR),//0x78 VReserved93

_VECTOR(Unimplemented_ISR),//0x7C Vtim1ovf

_VECTOR(Unimplemented_ISR),//0x80 VReserved91

_VECTOR(Unimplemented_ISR),//0x84 VReserved90

_VECTOR(Unimplemented_ISR),//0x88 VReserved89

_VECTOR(Unimplemented_ISR),//0x8C VReserved88

_VECTOR(Unimplemented_ISR),//0x90 Vtim1ch3

_VECTOR(Unimplemented_ISR),//0x94 Vtim1ch2

_VECTOR(Unimplemented_ISR),//0x98 Vtim1ch1

_VECTOR(Unimplemented_ISR),//0x9C Vtim1ch0

_VECTOR(Unimplemented_ISR),//0xA0 VReserved83

_VECTOR(Unimplemented_ISR),//0xA4 VReserved82

_VECTOR(Unimplemented_ISR),//0xA8 VReserved81

_VECTOR(Unimplemented_ISR),//0xAC VReserved80

_VECTOR(Unimplemented_ISR),//0xB0 Vportl

_VECTOR(Unimplemented_ISR),//0xB4 VReserved78

_VECTOR(Unimplemented_ISR),//0xB8 VReserved77

_VECTOR(Unimplemented_ISR),//0xBC VReserved76

_VECTOR(Unimplemented_ISR),//0xC0 VReserved75

_VECTOR(Unimplemented_ISR),//0xC4 VReserved74

_VECTOR(Unimplemented_ISR),//0xC8 VReserved73

_VECTOR(Unimplemented_ISR),//0xCC VReserved72

_VECTOR(Unimplemented_ISR),//0xD0 VReserved71

_VECTOR(Unimplemented_ISR),//0xD4 VReserved70

_VECTOR(Unimplemented_ISR),//0xD8 VReserved69

_VECTOR(Unimplemented_ISR),//0xDC VReserved68

_VECTOR(Unimplemented_ISR),//0xE0 VReserved67

_VECTOR(WakeUpISR), //0xE4 Vportad

_VECTOR(Unimplemented_ISR),//0xE8 VReserved65

_VECTOR(Unimplemented_ISR),//0xEC Vhti

_VECTOR(Unimplemented_ISR),//0xF0 Vapi

_VECTOR(Unimplemented_ISR),//0xF4 Vlvi

_VECTOR(Unimplemented_ISR),//0xF8 Vevddx

_VECTOR(Unimplemented_ISR),//0xFC Vportp

_VECTOR(Unimplemented_ISR),//0x100 VReserved59

_VECTOR(Unimplemented_ISR),//0x104 VReserved58

_VECTOR(Unimplemented_ISR),//0x108 VReserved57

_VECTOR(Unimplemented_ISR),//0x10C VReserved56

_VECTOR(Unimplemented_ISR),//0x110 VReserved55

_VECTOR(Unimplemented_ISR),//0x114 Vports

_VECTOR(Unimplemented_ISR),//0x118 Vcanphy0

_VECTOR(Unimplemented_ISR),//0x11C VReserved52

_VECTOR(Unimplemented_ISR),//0x120 VReserved51

_VECTOR(Unimplemented_ISR),//0x124 VReserved50

_VECTOR(Unimplemented_ISR),//0x128 VReserved49

_VECTOR(Unimplemented_ISR),//0x12C VReserved48

_VECTOR(Unimplemented_ISR),//0x130 Vbats

_VECTOR(Unimplemented_ISR),//0x134 VReserved46

_VECTOR(Unimplemented_ISR),//0x138 VReserved45

_VECTOR(Unimplemented_ISR),//0x13C VReserved44

_VECTOR(Unimplemented_ISR),//0x140 Vcan0tx

_VECTOR(Unimplemented_ISR),//0x144 Vcan0rx

_VECTOR(Unimplemented_ISR),//0x148 Vcan0err

_VECTOR(Unimplemented_ISR),//0x14C Vcan0wkup

_VECTOR(Unimplemented_ISR),//0x150 Vflash

_VECTOR(Unimplemented_ISR),//0x154 Vflasherr

_VECTOR(Unimplemented_ISR),//0x158 VReserved37

_VECTOR(Unimplemented_ISR),//0x15C Vspi1

_VECTOR(Unimplemented_ISR),//0x160 VRAM_err

_VECTOR(Unimplemented_ISR),//0x164 Vacmp1

_VECTOR(Unimplemented_ISR),//0x168 Vacmp0

_VECTOR(Unimplemented_ISR),//0x16C Vcpmuplllck

_VECTOR(Unimplemented_ISR),//0x170 Vcpmuosc

_VECTOR(Unimplemented_ISR),//0x174 Vadc0conv_compl

_VECTOR(Unimplemented_ISR),//0x178 Vadc0conv_seq_abrt

_VECTOR(Unimplemented_ISR),//0x17C Vadc0err

_VECTOR(Unimplemented_ISR),//0x180 VReserved27

_VECTOR(Unimplemented_ISR),//0x184 VReserved26

_VECTOR(Unimplemented_ISR),//0x188 Vsci1

_VECTOR(Unimplemented_ISR),//0x18C Vsci0

_VECTOR(Unimplemented_ISR),//0x190 Vspi0

_VECTOR(Unimplemented_ISR),//0x194 Vtim0paie

_VECTOR(Unimplemented_ISR),//0x198 Vtim0paaovf

_VECTOR(Unimplemented_ISR),//0x19C Vtim0ovf

_VECTOR(Unimplemented_ISR),//0x1A0 Vtim0ch7

_VECTOR(Unimplemented_ISR),//0x1A4 Vtim0ch6

_VECTOR(Unimplemented_ISR),//0x1A8 Vtim0ch5

_VECTOR(Unimplemented_ISR),//0x1AC Vtim0ch4

_VECTOR(Unimplemented_ISR),//0x1B0 Vtim0ch3

_VECTOR(Unimplemented_ISR),//0x1B4 Vtim0ch2

_VECTOR(Unimplemented_ISR),//0x1B8 Vtim0ch1

_VECTOR(Unimplemented_ISR),//0x1BC Vtim0ch0

_VECTOR(Unimplemented_ISR),//0x1C0 Vrti

_VECTOR(Unimplemented_ISR),//0x1C4 Virq

_VECTOR(Unimplemented_ISR),//0x1C8 Vxirq

_VECTOR(Unimplemented_ISR),//0x1CC Vsi

_VECTOR(Unimplemented_ISR),//0x1D0 VReserved7

_VECTOR(Unimplemented_ISR),//0x1D4 VReserved6

_VECTOR(Unimplemented_ISR),//0x1D8 Vme

_VECTOR(Unimplemented_ISR),//0x1DC Vsys

_VECTOR(Unimplemented_ISR),//0x1E0 Vswi

_VECTOR(Unimplemented_ISR),//0x1E4 Vtrap

_VECTOR(Unimplemented_ISR),//0x1E8 Vspare

};

#endif /* VECTORTABLE_H_ */

/******************************End VectorTable.h*****************************************/

Re: Relocating interrupt vector table for s12zvc

RadekS — Thu, 30 Jun 2016 08:32:53 GMT

Hi Kiran,

I see 16byte shift in your table.

PortAD interrupt vector should be on address = Vector base + 0xF4.

The same way are shifted also other interrupt vectors.

I started my vector table from address 0xFFF610 and my table has 123 vectors.

When you start table without that offset (0x10), you table should contain 127 vectors (the last/first vector is reset vector).

Note: 128 x 4B vector size = 512B

I hope it helps you.

Have a great day,
Radek

Re: Relocating interrupt vector table for s12zvc

kiranbhat — Thu, 30 Jun 2016 11:31:28 GMT

Hi Radek

Thank you for the support issue solved. But i am still not clear with mapping concept. How it works and how linking happens. If you dont mind can you please explain the concept.

Regards

Kiran Bhat

Re: Relocating interrupt vector table for s12zvc

RadekS — Thu, 30 Jun 2016 18:11:43 GMT

Hi Kiran,

Sure, it is really simple.

I will explain vector fetch on example.

When API interrupt occurs, the CPU finish current instruction and the interrupt module calculates offset according to interrupt source. In this case, it is 0x100.

See Table 1-13. Interrupt Vector Locations.

The CPU simply takes IVBR register content, move it to left by 8 bits (IVBR contains upper 15 bits from vector base address) and adds 0x100 offset. For example IVBR=0xFFC4. So, vector base is 0xFFC400. After adding 0x100 offset, we will get address 0xFFC500. At this address is stored starting address of API_ISR routine.

So, CPU will push their registers on stack and jump into API_ISR routine.

When code in API_ISR routine ends, the RTI instruction (Return from Interrupt) will pull back CPU registers from the stack.

Note: The RTI instruction is added on the end of ISR automatically because we used “interrupt” keyword in ISR declaration.

Note: Every vector has 4 bytes despite on fact that only 3 bytes are used for ISR address. So, if we want to fill a table with pointers to interrupt routines, we have to add dummy/padding byte at the beginning of every ISR address.

I hope it helps you.

Have a great day,
Radek