topic Re: S12ZVH128 CPU Frequency in S12 / MagniV Microcontrollers

S12ZVH128 CPU Frequency

axhubner — Mon, 09 May 2016 14:59:39 GMT

Hi,

i am currently using the TRK S12ZVH128 evolution board for pre-development.

I am trying to set the CPU Bus frequency up to 32Mhz (Max frequency).

Unfortunately the code always crashes when I try to set the CPMUSYNR register.

To eliminate bugs on my code i also tried to generate the CPU init code with processor expert, but it still crashes.

When i reduce the frequency down to 26 Mhz the initialization seems to work.

As i told, we are using the S12ZVH128 for pre-developing. For the product itself a S12zVH64 is planned.

If i run the code with the S12zVH64 it seems to work correctly. Why can't i use the maximum frequency for the S12ZVH128 and is it a problem to use 32Mhz for the S12zVH64?

void _EntryPoint(void)

{

/*** !!! Here you can place your own code using property "User code before PE initialization" on the build options tab of the CPU compoennt. !!! ***/

/* ### MC9S12ZVH128_144 "Cpu" init code ... */

/* PE initialization code after reset */

/* IVBR: IVB_ADDR=0x7FFF,??=0 */

setReg16(IVBR, 0xFFFEU);

/* ECLKCTL: NECLK=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */

setReg8(ECLKCTL, 0x80U);

/* System clock initialization */

/* CPMUPROT: ??=0,??=0,??=1,??=0,??=0,??=1,??=1,PROT=0 */

setReg8(CPMUPROT, 0x26U); /* Disable protection of clock configuration registers */

/* CPMUCLKS: PSTP=0 */

clrReg8Bits(CPMUCLKS, 0x40U);

/* CPMUCLKS: PLLSEL=1 */

setReg8Bits(CPMUCLKS, 0x80U); /* Enable the PLL to allow write to divider registers */

/* CPMUPOSTDIV: ??=0,??=0,??=0,POSTDIV4=0,POSTDIV3=0,POSTDIV2=0,POSTDIV1=0,POSTDIV0=0 */

setReg8(CPMUPOSTDIV, 0x00U); /* Set the post divider register */

/* Whenever changing PLL reference clock (REFCLK) frequency to a higher value

it is recommended to write CPMUSYNR = 0x00 in order to stay within specified

maximum frequency of the MCU */

/* CPMUSYNR: VCOFRQ1=0,VCOFRQ0=0,SYNDIV5=0,SYNDIV4=0,SYNDIV3=0,SYNDIV2=0,SYNDIV1=0,SYNDIV0=0 */

setReg8(CPMUSYNR, 0x00U); /* Set the multiplier register */

/* CPMUPLL: ??=0,??=0,FM1=0,FM0=0,??=0,??=0,??=0,??=0 */

setReg8(CPMUPLL, 0x00U); /* Set the PLL frequency modulation */

/* CPMUSYNR: VCOFRQ1=0,VCOFRQ0=1,SYNDIV5=0,SYNDIV4=1,SYNDIV3=1,SYNDIV2=1,SYNDIV1=1,SYNDIV0=1 */

setReg8(CPMUSYNR, 0x5FU); /* Set the multiplier register */ --> Crash

Regards

Axel

Re: S12ZVH128 CPU Frequency

RadekS — Wed, 11 May 2016 08:40:25 GMT

Hi Axel,

There might be the problem with BDM communication while debugging when MCU bus clock is set to close to maximum bus clock value.

This because the default debug configuration is set in order to the bus clock is used as debug controller clock source.

In order to change this feature, please go to CW project main menu -> Run -> Debug Configurations...

In the Debug Configurations window, find Target Settings -> Connection -> Edit...

In the Hardware or Simulator Connection window, find Connection tab and uncheck the box: 'Use Bus Clock as Debug Controller Clock Source', click OK.

In that case, the debug module will use 1MHz IRC clock for BDM communication instead Bus clock.

S12Z clock example codes:

https://community.freescale.com/docs/DOC-330238

I hope it helps you.

Have a great day,
RadekS

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Re: S12ZVH128 CPU Frequency

axhubner — Wed, 11 May 2016 09:31:07 GMT

Thanks Radek, it works